On 11/06/2015 11:54 PM, Jon Mason wrote:
> On Fri, Nov 06, 2015 at 10:42:41PM +0100, Hauke Mehrtens wrote:
>> On 11/06/2015 10:11 PM, Kapil Hali wrote:
>>> From: Jon Mason <jonma...@broadcom.com>
>>>
>>> Add SMP support for Broadcom's 4708 SoCs.
>>>
>>> Signed-off-by: Jon Mason <jonma...@broadcom.com>
>>> Acked-by: Hauke Mehrtens <ha...@hauke-m.de>
>>> Tested-by: Hauke Mehrtens <ha...@hauke-m.de>
>>> Signed-off-by: Kapil Hali <kap...@broadcom.com>
>>
>> I tested this on a Netgear R6250 V1 (BCM4708) and SMP worked.
>>
>>> ---
>>>  arch/arm/boot/dts/bcm4708.dtsi | 2 ++
>>>  arch/arm/mach-bcm/Kconfig      | 1 +
>>>  arch/arm/mach-bcm/Makefile     | 3 +++
>>>  3 files changed, 6 insertions(+)
>>>
>>
>> ...
>>
>>> --- a/arch/arm/mach-bcm/Kconfig
>>> +++ b/arch/arm/mach-bcm/Kconfig
>>> @@ -54,6 +54,7 @@ config ARCH_BCM_NSP
>>>  config ARCH_BCM_5301X
>>>     bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
>>>     select ARCH_BCM_IPROC
>>
>> You activated ARM_ERRATA_764369 for NSP is this not needed for NS?
> 
> I'm not certain the CPU version, and without that it is difficult to
> know what errata's are present in the underlying hardware.  My guess
> is that all present in NSP are present in NS (for UP and SMP).  This
> would put it as:
>         select ARM_ERRATA_754322
>         select ARM_ERRATA_775420
>         select ARM_ERRATA_764369 if SMP
> 
> Would you like me to have them added?
> 

I will send a separate patch adding all the workarounds for erratas in
the CPU core and the cache controller.

Hauke


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