On Thu, Jan 21, 2016 at 03:53:54PM +0800, Yuan Yao wrote: > Add R/W functions for big- or little-endian registers: > The qSPI controller's endian is independent of the CPU core's endian. > So far, the qSPI have two versions for big-endian and little-endian. > > Signed-off-by: Yuan Yao <yao.y...@nxp.com> > Acked-by: Han xu <han...@freescale.com> > ---
... > @@ -954,6 +990,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > if (IS_ERR(q->iobase)) > return PTR_ERR(q->iobase); > > + q->big_endian = of_property_read_bool(np, "big-endian"); > res = platform_get_resource_byname(pdev, IORESOURCE_MEM, > "QuadSPI-memory"); > if (!devm_request_mem_region(dev, res->start, resource_size(res), Still no documentation for this property?? You're trying my patience. We've had the same request since November, and you haven't managed to satisfy it.
