On Thu, Feb 04, 2016 at 04:42:53PM -0800, David Daney wrote: > From: David Daney <[email protected]> > > Add irq_chip support for both IPI and "normal" interrupts of the CIU3 > controller. Document the device tree binding for the CIU3. > > Signed-off-by: David Daney <[email protected]> > Cc: Rob Herring <[email protected]> > Cc: Pawel Moll <[email protected]> > Cc: Mark Rutland <[email protected]> > Cc: Ian Campbell <[email protected]> > Cc: Kumar Gala <[email protected]> > Cc: [email protected] > Cc: Thomas Gleixner <[email protected]> > --- > .../devicetree/bindings/mips/cavium/ciu3.txt | 27 +
Acked-by: Rob Herring <[email protected]> > arch/mips/cavium-octeon/octeon-irq.c | 651 > ++++++++++++++++++++- > arch/mips/include/asm/octeon/octeon.h | 2 + > 3 files changed, 679 insertions(+), 1 deletion(-) > create mode 100644 Documentation/devicetree/bindings/mips/cavium/ciu3.txt
