Re: [RFC][PATCH 18/31] locking,powerpc: Implement atomic{,64}_fetch_{add,sub,and,or,xor}{,_relaxed,_acquire,_release}()

[Peter Zijlstra]

On Sat, Apr 23, 2016 at 12:41:57AM +0800, Boqun Feng wrote:
> > +#define ATOMIC_FETCH_OP_RELAXED(op, asm_op)                                
> > \
> > +static inline int atomic_fetch_##op##_relaxed(int a, atomic_t *v)  \
> > +{                                                                  \
> > +   int res, t;                                                     \
> > +                                                                   \
> > +   __asm__ __volatile__(                                           \
> > +"1:        lwarx   %0,0,%4         # atomic_fetch_" #op "_relaxed\n"       
> > \
> > +   #asm_op " %1,%2,%0\n"                                           \
> 
> Should be
> 
>       #asm_op " %1,%3,%0\n"
> 
> right? Because %2 is v->counter and %3 is @a.

Indeed, thanks!