This adds a device tree example for generic BCM96345GW2.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
arch/mips/bmips/Kconfig | 4 ++
arch/mips/boot/dts/brcm/Makefile | 2 +
arch/mips/boot/dts/brcm/bcm6345.dtsi | 94 +++++++++++++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm96345GW2.dts | 21 ++++++++
4 files changed, 121 insertions(+)
create mode 100644 arch/mips/boot/dts/brcm/bcm6345.dtsi
create mode 100644 arch/mips/boot/dts/brcm/bcm96345GW2.dts
diff --git a/arch/mips/bmips/Kconfig b/arch/mips/bmips/Kconfig
index 14f4b4c..b2426eb 100644
--- a/arch/mips/bmips/Kconfig
+++ b/arch/mips/bmips/Kconfig
@@ -25,6 +25,10 @@ config DT_BCM963268VR3032U
bool "BCM963268VR3032U"
select BUILTIN_DTB
+config DT_BCM96345GW2
+ bool "BCM96345GW2"
+ select BUILTIN_DTB
+
config DT_BCM96358NB4SER
bool "BCM96358NB4SER"
select BUILTIN_DTB
diff --git a/arch/mips/boot/dts/brcm/Makefile b/arch/mips/boot/dts/brcm/Makefile
index 2060e70..fe1f189 100644
--- a/arch/mips/boot/dts/brcm/Makefile
+++ b/arch/mips/boot/dts/brcm/Makefile
@@ -1,6 +1,7 @@
dtb-$(CONFIG_DT_BCM93384WVG) += bcm93384wvg.dtb
dtb-$(CONFIG_DT_BCM93384WVG_VIPER) += bcm93384wvg_viper.dtb
dtb-$(CONFIG_DT_BCM963268VR3032U) += bcm963268vr3032u.dtb
+dtb-$(CONFIG_DT_BCM96345GW2) += bcm96345gw2.dtb
dtb-$(CONFIG_DT_BCM96358NB4SER) += bcm96358nb4ser.dtb
dtb-$(CONFIG_DT_BCM96368MVWG) += bcm96368mvwg.dtb
dtb-$(CONFIG_DT_BCM9EJTAGPRB) += bcm9ejtagprb.dtb
@@ -17,6 +18,7 @@ dtb-$(CONFIG_DT_NONE) += \
bcm93384wvg.dtb \
bcm93384wvg_viper.dtb \
bcm963268vr3032u.dtb \
+ bcm96345gw2.dtb \
bcm96358nb4ser.dtb \
bcm96368mvwg.dtb \
bcm9ejtagprb.dtb \
diff --git a/arch/mips/boot/dts/brcm/bcm6345.dtsi
b/arch/mips/boot/dts/brcm/bcm6345.dtsi
new file mode 100644
index 0000000..49b6439
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm6345.dtsi
@@ -0,0 +1,94 @@
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6345";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mips-hpt-frequency = <70000000>;
+
+ cpu@0 {
+ compatible = "brcm,bmips3300";
+ device_type = "cpu";
+ reg = <0>;
+ };
+ };
+
+ clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ };
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ubus {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ compatible = "simple-bus";
+ ranges;
+
+ periph_cntl: syscon@fffe0000 {
+ compatible = "syscon";
+ reg = <0xfffe0000 0xc>;
+ native-endian;
+ };
+
+ reboot: syscon-reboot@fffe0008 {
+ compatible = "syscon-reboot";
+ regmap = <&periph_cntl>;
+ offset = <0x8>;
+ mask = <0x1>;
+ };
+
+ periph_intc: interrupt-controller@fffe000c {
+ compatible = "brcm,bcm6345-l1-intc";
+ reg = <0xfffe000c 0x8>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
+
+ uart0: serial@fffe0300 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0xfffe0300 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <2>;
+
+ clocks = <&periph_clk>;
+
+ status = "disabled";
+ };
+
+ ohci: usb@fffe2100 {
+ compatible = "brcm,bcm6345-ohci", "generic-ohci";
+ reg = <0xfffe2100 0x100>;
+ big-endian;
+ no-big-frame-no;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <5>;
+
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/mips/boot/dts/brcm/bcm96345GW2.dts
b/arch/mips/boot/dts/brcm/bcm96345GW2.dts
new file mode 100644
index 0000000..91271f3
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm96345GW2.dts
@@ -0,0 +1,21 @@
+/dts-v1/;
+
+/include/ "bcm6345.dtsi"
+
+/ {
+ compatible = "brcm,bcm96345gw2", "brcm,bcm6345";
+ model = "Broadcom BCM96345GW2";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x01000000>;
+ };
+
+ chosen {
+ stdout-path = &uart0;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
--
2.1.4
