On Thu, Aug 18, 2016 at 06:25:22PM +0200, Borislav Petkov wrote: > > > I could try to find better/more fitting event selectors on AMD... > > > > If you've got any other suggestions, I'm all ears. > > So there are no LLC events on AMD in the sense that there are no > event selectors which always mean last-level cache and select those > automagically, no matter whether the LLC is the L2, L3 and so on, > depending on the part. > > If we have to be correct on AMD, we'd have to check whether the part has > an L3 and then choose the L3 events, say, something like > > "EventSelect 4E1h L3 Cache Misses" and "EventSelect 4E2h L3 Fills caused > by L2 Evictions"
Can't those events are NB events and cannot be used on per CPU counters. The 7D,7E L2 events are the best that are available on AMD afaict.
