On 23 August 2016 at 21:55, Rob Herring <[email protected]> wrote: > On Tue, Aug 23, 2016 at 08:25:59AM +0200, Rafał Miłecki wrote: >> From: Rafał Miłecki <[email protected]> >> >> This clock is present on BCM53573 devices (including BCM47189) that use >> Cortex-A7. ILP is a part of PMU (Power Management Unit) and so it should >> be defined as one of its subnodes (subdevices). For more details see >> Documentation entry. >> >> Unfortunately there isn't a set of registers related to ILP clock only. >> We use registers 0x66c, 0x674 and 0x6dc and between them there are e.g. >> "retention*" and "control_ext" regs. This is why this driver maps all >> 0x1000 B of space. > > Then describe the block as a syscon which has several functions of > which clocks are one.
This isn't clear to me, sorry, could you describe it? Would you like me to update commit message or documentation? Is code fine as is?
