When I was testing my clk driver + generic cpufreq driver,
I was hit by a problem.
Everything worked fine on my 64-bit SoCs,
but not on 32-bit SoCs.
I found the cause of the problem was
that the type of clk_rate is "long".
It is long enough on 64-bit systems,
but only 32-bit wide on 32-bit systems.
The CPU clocks on my SoCs
are derived from a 2.4GHz PLL.
The .round_rate() callback tries to return 2400000000,
but it does not fit in a signed 32-bit-wide variable
and it is treated as -1894967296, which is an error.
In order to handle clock frequency safely,
shall we use "long long" instead?
(It is guaranteed to have 64-bit width)