Similar to the code in kvm_vcpu_check_singlestep, check for TF and, depending on the origin, synthesize a DB exception or an exit to userspace.
Signed-off-by: Kyle Huey <[email protected]> --- arch/x86/kvm/vmx.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index f404aef..6583e97 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -2470,16 +2470,37 @@ static void skip_emulated_instruction_no_trap(struct kvm_vcpu *vcpu) /* skipping an emulated instruction also counts */ vmx_set_interrupt_shadow(vcpu, 0); } static int skip_emulated_instruction(struct kvm_vcpu *vcpu) { skip_emulated_instruction_no_trap(vcpu); + + if (unlikely(vmx_get_rflags(vcpu) & X86_EFLAGS_TF)) { + if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) { + vcpu->run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | + DR6_RTM; + vcpu->run->debug.arch.pc = vcpu->arch.singlestep_rip; + vcpu->run->debug.arch.exception = DB_VECTOR; + vcpu->run->exit_reason = KVM_EXIT_DEBUG; + return 0; + } + + /* + * "Certain debug exceptions may clear bit 0-3. The + * remaining contents of the DR6 register are never + * cleared by the processor". + */ + vcpu->arch.dr6 &= ~15; + vcpu->arch.dr6 |= DR6_BS | DR6_RTM; + kvm_queue_exception(vcpu, DB_VECTOR); + } + return 1; } /* * KVM wants to inject page-faults which it got to the guest. This function * checks whether in a nested guest, we need to inject them to L1 or L2. */ static int nested_vmx_check_exception(struct kvm_vcpu *vcpu, unsigned nr) -- 2.10.2
