From: Markus Mayer <[email protected]> Add binding document for brcm,brcmstb-cpu-clk-div.
Signed-off-by: Markus Mayer <[email protected]> --- .../bindings/clock/brcm,brcmstb-cpu-clk-div.txt | 22 ++++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt diff --git a/Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt b/Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt new file mode 100644 index 0000000..7b6a8ce --- /dev/null +++ b/Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt @@ -0,0 +1,22 @@ +The CPU divider node serves as the sole clock for the CPU complex. It supports +power-of-2 clock division, with a divider of "1" as the default highest-speed +setting. + +Required properties: +- compatible: shall be "brcm,brcmstb-cpu-clk-div" +- reg: address and width of the divider configuration register +- #clock-cells: shall be set to 0 +- clocks: phandle of clock provider which provides the source clock + (this would typically be a "fixed-clock" type PLL) + +Optional properties: +- clock-names: the clock may be named + +Example: + cpuclkdiv: clock-controller@f03e257c { + compatible = "brcm,brcmstb-cpu-clk-div"; + reg = <0xf03e257c 0x4>; + #clock-cells = <0>; + clocks = <&cpupll>; + clock-names = "cpupll"; + }; diff --git a/MAINTAINERS b/MAINTAINERS index cfff2c9..690761d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2786,6 +2786,7 @@ M: [email protected] L: [email protected] S: Maintained F: Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt +F: Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt F: drivers/cpufreq/brcmstb* BROADCOM SPECIFIC AMBA DRIVER (BCMA) -- 2.7.4
