From: Andi Kleen <[email protected]> This is not a full uncore event list, but a short list of useful and understandable metrics.
Signed-off-by: Andi Kleen <[email protected]> Cc: Jiri Olsa <[email protected]> Link: http://lkml.kernel.org/n/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]> --- .../arch/x86/broadwellx/uncore-cache.json | 317 +++++++++++++++++++++ .../arch/x86/broadwellx/uncore-interconnect.json | 28 ++ .../arch/x86/broadwellx/uncore-memory.json | 83 ++++++ .../arch/x86/broadwellx/uncore-power.json | 84 ++++++ 4 files changed, 512 insertions(+) create mode 100644 tools/perf/pmu-events/arch/x86/broadwellx/uncore-cache.json create mode 100644 tools/perf/pmu-events/arch/x86/broadwellx/uncore-interconnect.json create mode 100644 tools/perf/pmu-events/arch/x86/broadwellx/uncore-memory.json create mode 100644 tools/perf/pmu-events/arch/x86/broadwellx/uncore-power.json diff --git a/tools/perf/pmu-events/arch/x86/broadwellx/uncore-cache.json b/tools/perf/pmu-events/arch/x86/broadwellx/uncore-cache.json new file mode 100644 index 000000000000..076459c51d4e --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/broadwellx/uncore-cache.json @@ -0,0 +1,317 @@ +[ + { + "BriefDescription": "Uncore cache clock ticks. Derived from unc_c_clockticks", + "Counter": "0,1,2,3", + "EventName": "UNC_C_CLOCKTICKS", + "PerPkg": "1", + "Unit": "CBO" + }, + { + "BriefDescription": "All LLC Misses (code+ data rd + data wr - including demand and prefetch). Derived from unc_c_llc_lookup.any", + "Counter": "0,1,2,3", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.ANY", + "Filter": "filter_state=0x1", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x11", + "Unit": "CBO" + }, + { + "BriefDescription": "M line evictions from LLC (writebacks to memory). Derived from unc_c_llc_victims.m_state", + "Counter": "0,1,2,3", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.M_STATE", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x1", + "Unit": "CBO" + }, + { + "BriefDescription": "LLC misses - demand and prefetch data reads - excludes LLC prefetches. Derived from unc_c_tor_inserts.miss_opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_MISSES.DATA_READ", + "Filter": "filter_opc=0x182", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x3", + "Unit": "CBO" + }, + { + "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_c_tor_inserts.miss_opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_MISSES.UNCACHEABLE", + "Filter": "filter_opc=0x187", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x3", + "Unit": "CBO" + }, + { + "BriefDescription": "MMIO reads. Derived from unc_c_tor_inserts.miss_opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_MISSES.MMIO_READ", + "Filter": "filter_opc=0x187,filter_nc=1", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x3", + "Unit": "CBO" + }, + { + "BriefDescription": "MMIO writes. Derived from unc_c_tor_inserts.miss_opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_MISSES.MMIO_WRITE", + "Filter": "filter_opc=0x18f,filter_nc=1", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x3", + "Unit": "CBO" + }, + { + "BriefDescription": "LLC prefetch misses for RFO. Derived from unc_c_tor_inserts.miss_opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_MISSES.RFO_LLC_PREFETCH", + "Filter": "filter_opc=0x190", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x3", + "Unit": "CBO" + }, + { + "BriefDescription": "LLC prefetch misses for code reads. Derived from unc_c_tor_inserts.miss_opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_MISSES.CODE_LLC_PREFETCH", + "Filter": "filter_opc=0x191", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x3", + "Unit": "CBO" + }, + { + "BriefDescription": "LLC prefetch misses for data reads. Derived from unc_c_tor_inserts.miss_opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_MISSES.DATA_LLC_PREFETCH", + "Filter": "filter_opc=0x192", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x3", + "Unit": "CBO" + }, + { + "BriefDescription": "LLC misses for PCIe read current. Derived from unc_c_tor_inserts.miss_opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_MISSES.PCIE_READ", + "Filter": "filter_opc=0x19e", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x3", + "Unit": "CBO" + }, + { + "BriefDescription": "ItoM write misses (as part of fast string memcpy stores) + PCIe full line writes. Derived from unc_c_tor_inserts.miss_opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_MISSES.PCIE_WRITE", + "Filter": "filter_opc=0x1c8", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x3", + "Unit": "CBO" + }, + { + "BriefDescription": "PCIe write misses (full cache line). Derived from unc_c_tor_inserts.miss_opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_MISSES.PCIE_NON_SNOOP_WRITE", + "Filter": "filter_opc=0x1c8,filter_tid=0x3e", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x3", + "Unit": "CBO" + }, + { + "BriefDescription": "PCIe writes (partial cache line). Derived from unc_c_tor_inserts.opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_REFERENCES.PCIE_NS_PARTIAL_WRITE", + "Filter": "filter_opc=0x180,filter_tid=0x3e", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CBO" + }, + { + "BriefDescription": "L2 demand and L2 prefetch code references to LLC. Derived from unc_c_tor_inserts.opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_REFERENCES.CODE_LLC_PREFETCH", + "Filter": "filter_opc=0x181", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x1", + "Unit": "CBO" + }, + { + "BriefDescription": "Streaming stores (full cache line). Derived from unc_c_tor_inserts.opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_REFERENCES.STREAMING_FULL", + "Filter": "filter_opc=0x18c", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x1", + "Unit": "CBO" + }, + { + "BriefDescription": "Streaming stores (partial cache line). Derived from unc_c_tor_inserts.opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_REFERENCES.STREAMING_PARTIAL", + "Filter": "filter_opc=0x18d", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x1", + "Unit": "CBO" + }, + { + "BriefDescription": "PCIe read current. Derived from unc_c_tor_inserts.opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_REFERENCES.PCIE_READ", + "Filter": "filter_opc=0x19e", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x1", + "Unit": "CBO" + }, + { + "BriefDescription": "PCIe write references (full cache line). Derived from unc_c_tor_inserts.opcode", + "Counter": "0,1,2,3", + "EventCode": "0x35", + "EventName": "LLC_REFERENCES.PCIE_WRITE", + "Filter": "filter_opc=0x1c8,filter_tid=0x3e", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x1", + "Unit": "CBO" + }, + { + "BriefDescription": "Occupancy counter for LLC data reads (demand and L2 prefetch). Derived from unc_c_tor_occupancy.miss_opcode", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.LLC_DATA_READ", + "Filter": "filter_opc=0x182", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "CBO" + }, + { + "BriefDescription": "read requests to home agent. Derived from unc_h_requests.reads", + "Counter": "0,1,2,3", + "EventCode": "0x1", + "EventName": "UNC_H_REQUESTS.READS", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "HA" + }, + { + "BriefDescription": "read requests to local home agent. Derived from unc_h_requests.reads_local", + "Counter": "0,1,2,3", + "EventCode": "0x1", + "EventName": "UNC_H_REQUESTS.READS_LOCAL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "HA" + }, + { + "BriefDescription": "read requests to remote home agent. Derived from unc_h_requests.reads_remote", + "Counter": "0,1,2,3", + "EventCode": "0x1", + "EventName": "UNC_H_REQUESTS.READS_REMOTE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "HA" + }, + { + "BriefDescription": "write requests to home agent. Derived from unc_h_requests.writes", + "Counter": "0,1,2,3", + "EventCode": "0x1", + "EventName": "UNC_H_REQUESTS.WRITES", + "PerPkg": "1", + "UMask": "0xC", + "Unit": "HA" + }, + { + "BriefDescription": "write requests to local home agent. Derived from unc_h_requests.writes_local", + "Counter": "0,1,2,3", + "EventCode": "0x1", + "EventName": "UNC_H_REQUESTS.WRITES_LOCAL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "HA" + }, + { + "BriefDescription": "write requests to remote home agent. Derived from unc_h_requests.writes_remote", + "Counter": "0,1,2,3", + "EventCode": "0x1", + "EventName": "UNC_H_REQUESTS.WRITES_REMOTE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "HA" + }, + { + "BriefDescription": "Conflict requests (requests for same address from multiple agents simultaneously). Derived from unc_h_snoop_resp.rspcnflct", + "Counter": "0,1,2,3", + "EventCode": "0x21", + "EventName": "UNC_H_SNOOP_RESP.RSPCNFLCT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "HA" + }, + { + "BriefDescription": "M line forwarded from remote cache along with writeback to memory. Derived from unc_h_snoop_resp.rsp_fwd_wb", + "Counter": "0,1,2,3", + "EventCode": "0x21", + "EventName": "UNC_H_SNOOP_RESP.RSP_FWD_WB", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x20", + "Unit": "HA" + }, + { + "BriefDescription": "M line forwarded from remote cache with no writeback to memory. Derived from unc_h_snoop_resp.rspifwd", + "Counter": "0,1,2,3", + "EventCode": "0x21", + "EventName": "UNC_H_SNOOP_RESP.RSPIFWD", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x4", + "Unit": "HA" + }, + { + "BriefDescription": "Shared line response from remote cache. Derived from unc_h_snoop_resp.rsps", + "Counter": "0,1,2,3", + "EventCode": "0x21", + "EventName": "UNC_H_SNOOP_RESP.RSPS", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x2", + "Unit": "HA" + }, + { + "BriefDescription": "Shared line forwarded from remote cache. Derived from unc_h_snoop_resp.rspsfwd", + "Counter": "0,1,2,3", + "EventCode": "0x21", + "EventName": "UNC_H_SNOOP_RESP.RSPSFWD", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x8", + "Unit": "HA" + } +] diff --git a/tools/perf/pmu-events/arch/x86/broadwellx/uncore-interconnect.json b/tools/perf/pmu-events/arch/x86/broadwellx/uncore-interconnect.json new file mode 100644 index 000000000000..39387f7909b2 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/broadwellx/uncore-interconnect.json @@ -0,0 +1,28 @@ +[ + { + "BriefDescription": "QPI clock ticks. Derived from unc_q_clockticks", + "Counter": "0,1,2,3", + "EventCode": "0x14", + "EventName": "UNC_Q_CLOCKTICKS", + "PerPkg": "1", + "Unit": "QPI LL" + }, + { + "BriefDescription": "Number of data flits transmitted . Derived from unc_q_txl_flits_g0.data", + "Counter": "0,1,2,3", + "EventName": "UNC_Q_TxL_FLITS_G0.DATA", + "PerPkg": "1", + "ScaleUnit": "8Bytes", + "UMask": "0x2", + "Unit": "QPI LL" + }, + { + "BriefDescription": "Number of non data (control) flits transmitted . Derived from unc_q_txl_flits_g0.non_data", + "Counter": "0,1,2,3", + "EventName": "UNC_Q_TxL_FLITS_G0.NON_DATA", + "PerPkg": "1", + "ScaleUnit": "8Bytes", + "UMask": "0x4", + "Unit": "QPI LL" + } +] diff --git a/tools/perf/pmu-events/arch/x86/broadwellx/uncore-memory.json b/tools/perf/pmu-events/arch/x86/broadwellx/uncore-memory.json new file mode 100644 index 000000000000..d17dc235f734 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/broadwellx/uncore-memory.json @@ -0,0 +1,83 @@ +[ + { + "BriefDescription": "read requests to memory controller. Derived from unc_m_cas_count.rd", + "Counter": "0,1,2,3", + "EventCode": "0x4", + "EventName": "UNC_M_CAS_COUNT.RD", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0x3", + "Unit": "iMC" + }, + { + "BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr", + "Counter": "0,1,2,3", + "EventCode": "0x4", + "EventName": "UNC_M_CAS_COUNT.WR", + "PerPkg": "1", + "ScaleUnit": "64Bytes", + "UMask": "0xC", + "Unit": "iMC" + }, + { + "BriefDescription": "Memory controller clock ticks. Derived from unc_m_clockticks", + "Counter": "0,1,2,3", + "EventName": "UNC_M_CLOCKTICKS", + "PerPkg": "1", + "Unit": "iMC" + }, + { + "BriefDescription": "Cycles where DRAM ranks are in power down (CKE) mode. Derived from unc_m_power_channel_ppd", + "Counter": "0,1,2,3", + "EventCode": "0x85", + "EventName": "UNC_M_POWER_CHANNEL_PPD", + "MetricExpr": "(UNC_M_POWER_CHANNEL_PPD / UNC_M_CLOCKTICKS) * 100.", + "PerPkg": "1", + "Unit": "iMC" + }, + { + "BriefDescription": "Cycles all ranks are in critical thermal throttle. Derived from unc_m_power_critical_throttle_cycles", + "Counter": "0,1,2,3", + "EventCode": "0x86", + "EventName": "UNC_M_POWER_CRITICAL_THROTTLE_CYCLES", + "MetricExpr": "(UNC_M_POWER_CRITICAL_THROTTLE_CYCLES / UNC_M_CLOCKTICKS) * 100.", + "PerPkg": "1", + "Unit": "iMC" + }, + { + "BriefDescription": "Cycles Memory is in self refresh power mode. Derived from unc_m_power_self_refresh", + "Counter": "0,1,2,3", + "EventCode": "0x43", + "EventName": "UNC_M_POWER_SELF_REFRESH", + "MetricExpr": "(UNC_M_POWER_SELF_REFRESH / UNC_M_CLOCKTICKS) * 100.", + "PerPkg": "1", + "Unit": "iMC" + }, + { + "BriefDescription": "Pre-charges due to page misses. Derived from unc_m_pre_count.page_miss", + "Counter": "0,1,2,3", + "EventCode": "0x2", + "EventName": "UNC_M_PRE_COUNT.PAGE_MISS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "iMC" + }, + { + "BriefDescription": "Pre-charge for reads. Derived from unc_m_pre_count.rd", + "Counter": "0,1,2,3", + "EventCode": "0x2", + "EventName": "UNC_M_PRE_COUNT.RD", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "iMC" + }, + { + "BriefDescription": "Pre-charge for writes. Derived from unc_m_pre_count.wr", + "Counter": "0,1,2,3", + "EventCode": "0x2", + "EventName": "UNC_M_PRE_COUNT.WR", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "iMC" + } +] diff --git a/tools/perf/pmu-events/arch/x86/broadwellx/uncore-power.json b/tools/perf/pmu-events/arch/x86/broadwellx/uncore-power.json new file mode 100644 index 000000000000..b44d43088bbb --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/broadwellx/uncore-power.json @@ -0,0 +1,84 @@ +[ + { + "BriefDescription": "PCU clock ticks. Use to get percentages of PCU cycles events. Derived from unc_p_clockticks", + "Counter": "0,1,2,3", + "EventName": "UNC_P_CLOCKTICKS", + "PerPkg": "1", + "Unit": "PCU" + }, + { + "BriefDescription": "C0 and C1. Derived from unc_p_power_state_occupancy.cores_c0", + "Counter": "0,1,2,3", + "EventCode": "0x80", + "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C0", + "Filter": "occ_sel=1", + "MetricExpr": "(UNC_P_POWER_STATE_OCCUPANCY.CORES_C0 / UNC_P_CLOCKTICKS) * 100.", + "PerPkg": "1", + "Unit": "PCU" + }, + { + "BriefDescription": "C3. Derived from unc_p_power_state_occupancy.cores_c3", + "Counter": "0,1,2,3", + "EventCode": "0x80", + "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C3", + "Filter": "occ_sel=2", + "MetricExpr": "(UNC_P_POWER_STATE_OCCUPANCY.CORES_C3 / UNC_P_CLOCKTICKS) * 100.", + "PerPkg": "1", + "Unit": "PCU" + }, + { + "BriefDescription": "C6 and C7. Derived from unc_p_power_state_occupancy.cores_c6", + "Counter": "0,1,2,3", + "EventCode": "0x80", + "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C6", + "Filter": "occ_sel=3", + "MetricExpr": "(UNC_P_POWER_STATE_OCCUPANCY.CORES_C6 / UNC_P_CLOCKTICKS) * 100.", + "PerPkg": "1", + "Unit": "PCU" + }, + { + "BriefDescription": "External Prochot. Derived from unc_p_prochot_external_cycles", + "Counter": "0,1,2,3", + "EventCode": "0xA", + "EventName": "UNC_P_PROCHOT_EXTERNAL_CYCLES", + "MetricExpr": "(UNC_P_PROCHOT_EXTERNAL_CYCLES / UNC_P_CLOCKTICKS) * 100.", + "PerPkg": "1", + "Unit": "PCU" + }, + { + "BriefDescription": "Thermal Strongest Upper Limit Cycles. Derived from unc_p_freq_max_limit_thermal_cycles", + "Counter": "0,1,2,3", + "EventCode": "0x4", + "EventName": "UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES", + "MetricExpr": "(UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES / UNC_P_CLOCKTICKS) * 100.", + "PerPkg": "1", + "Unit": "PCU" + }, + { + "BriefDescription": "OS Strongest Upper Limit Cycles. Derived from unc_p_freq_max_os_cycles", + "Counter": "0,1,2,3", + "EventCode": "0x6", + "EventName": "UNC_P_FREQ_MAX_OS_CYCLES", + "MetricExpr": "(UNC_P_FREQ_MAX_OS_CYCLES / UNC_P_CLOCKTICKS) * 100.", + "PerPkg": "1", + "Unit": "PCU" + }, + { + "BriefDescription": "Power Strongest Upper Limit Cycles. Derived from unc_p_freq_max_power_cycles", + "Counter": "0,1,2,3", + "EventCode": "0x5", + "EventName": "UNC_P_FREQ_MAX_POWER_CYCLES", + "MetricExpr": "(UNC_P_FREQ_MAX_POWER_CYCLES / UNC_P_CLOCKTICKS) * 100.", + "PerPkg": "1", + "Unit": "PCU" + }, + { + "BriefDescription": "Cycles spent changing Frequency. Derived from unc_p_freq_trans_cycles", + "Counter": "0,1,2,3", + "EventCode": "0x74", + "EventName": "UNC_P_FREQ_TRANS_CYCLES", + "MetricExpr": "(UNC_P_FREQ_TRANS_CYCLES / UNC_P_CLOCKTICKS) * 100.", + "PerPkg": "1", + "Unit": "PCU" + } +] -- 2.9.3
