On Mon, Jul 10, 2017 at 10:27:05AM -0700, Andi Kleen wrote: > On Mon, Jul 10, 2017 at 06:42:06PM +0200, Peter Zijlstra wrote:
> > I have, and last time I did the actual poking at the LAPIC (to make NOHZ > > happen) was by far the slowest thing happening. > > That must have been a long time ago because modern systems use TSC deadline > for a very long time ... Its been a while, but I didn't use the very latest chip when I did. > It's still slow, but not as slow as the LAPIC. Deadline TSC is a LAPIC timer mode. Sure the MSR might be slightly cheaper than the MMIO, but its still painful.
