From: Juerg Haefliger <[email protected]> Add a hook for flushing a single TLB entry on arm64.
Signed-off-by: Juerg Haefliger <[email protected]> Tested-by: Tycho Andersen <[email protected]> --- arch/arm64/include/asm/tlbflush.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index af1c76981911..8e0c49105d3e 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -184,6 +184,14 @@ static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end isb(); } +static inline void __flush_tlb_one(unsigned long addr) +{ + dsb(ishst); + __tlbi(vaae1is, addr >> 12); + dsb(ish); + isb(); +} + /* * Used to invalidate the TLB (walk caches) corresponding to intermediate page * table levels (pgd/pud/pmd). -- 2.11.0
