Add bindings for Microsemi SoCs. Currently only Ocelot is supported. Signed-off-by: Alexandre Belloni <[email protected]> --- Cc: Rob Herring <[email protected]> Cc: [email protected]
Documentation/devicetree/bindings/mips/mscc.txt | 6 ++++++ 1 file changed, 6 insertions(+) create mode 100644 Documentation/devicetree/bindings/mips/mscc.txt diff --git a/Documentation/devicetree/bindings/mips/mscc.txt b/Documentation/devicetree/bindings/mips/mscc.txt new file mode 100644 index 000000000000..2c52e76b7142 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/mscc.txt @@ -0,0 +1,6 @@ +* Microsemi MIPS CPUs + +Required properties: +- compatible: "brcm,ocelot" + +- mips-hpt-frequency: CPU counter frequency. -- 2.15.0
