Add syscon properties required for configuring PCIe in x2 lane mode.
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
Signed-off-by: Sekhar Nori <[email protected]>
---
Documentation/devicetree/bindings/pci/ti-pci.txt | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt
b/Documentation/devicetree/bindings/pci/ti-pci.txt
index 82cb875e4cec..bfbc77ac7355 100644
--- a/Documentation/devicetree/bindings/pci/ti-pci.txt
+++ b/Documentation/devicetree/bindings/pci/ti-pci.txt
@@ -13,6 +13,12 @@ PCIe DesignWare Controller
- ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
where <X> is the instance number of the pcie from the HW spec.
- num-lanes as specified in ../designware-pcie.txt
+ - ti,syscon-lane-conf : phandle/offset pair. Phandle to the system control
+ module and the register offset to specify 1 lane or
+ 2 lane.
+ - ti,syscon-lane-sel : phandle/offset pair. Phandle to the system control
+ module and the register offset to specify lane
+ selection.
HOST MODE
=========
--
2.11.0
