On Wed, Jan 31, 2018 at 06:28:05PM +0000, Suzuki K Poulose wrote: > Update the MIDR encodings for the Cortex-A55 and Cortex-A35 > > Signed-off-by: Suzuki K Poulose <[email protected]>
Reviewed-by: Dave Martin <[email protected]> > --- > arch/arm64/include/asm/cputype.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/include/asm/cputype.h > b/arch/arm64/include/asm/cputype.h > index 26bc5b302060..308507e99430 100644 > --- a/arch/arm64/include/asm/cputype.h > +++ b/arch/arm64/include/asm/cputype.h > @@ -83,6 +83,8 @@ > #define ARM_CPU_PART_CORTEX_A53 0xD03 > #define ARM_CPU_PART_CORTEX_A73 0xD09 > #define ARM_CPU_PART_CORTEX_A75 0xD0A > +#define ARM_CPU_PART_CORTEX_A35 0xD04 > +#define ARM_CPU_PART_CORTEX_A55 0xD05 > > #define APM_CPU_PART_POTENZA 0x000 > > @@ -101,6 +103,8 @@ > #define MIDR_CORTEX_A72 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, > ARM_CPU_PART_CORTEX_A72) > #define MIDR_CORTEX_A73 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, > ARM_CPU_PART_CORTEX_A73) > #define MIDR_CORTEX_A75 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, > ARM_CPU_PART_CORTEX_A75) > +#define MIDR_CORTEX_A35 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, > ARM_CPU_PART_CORTEX_A35) > +#define MIDR_CORTEX_A55 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, > ARM_CPU_PART_CORTEX_A55) > #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, > CAVIUM_CPU_PART_THUNDERX) > #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, > CAVIUM_CPU_PART_THUNDERX_81XX) > #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, > CAVIUM_CPU_PART_THUNDERX_83XX) > -- > 2.14.3 > > > _______________________________________________ > linux-arm-kernel mailing list > [email protected] > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
