On 27/11/17 10:24, Stephen Boyd wrote:
Some GIC configurations don't have an accessible ITS, but they
want to support MSIs through the distributor's SETSPI registers
or through the IMPLEMENTATION DEFINED message-based interrupt
request register region. This mode of operation is similar to the
v2m support on gic-400, but we don't necessarily know what
particular SPIs are supported as MSIs so we need some help from
firmware to know what to do.

Introduce an "arm,spi-ranges" property for this, similar to the
"marvell,spi-ranges" property, that indicates the base and size
of each MSI range. This property applies equally to the
distributor and alias registers. In either case, we detect this
mode of operation by looking for a node with the "msi-controller"
property and then probe the v2m frame code on top of it. Assume
these nodes will have the "arm,spi-ranges" property in them so
that the v2m code works mostly unmodified.

Cc: <devicet...@vger.kernel.org>
Cc: Srinivas Kandagatla <srinivas.kandaga...@linaro.org>
Cc: Marc Zyngier <marc.zyng...@arm.com>
Signed-off-by: Stephen Boyd <sb...@codeaurora.org>
---
  .../bindings/interrupt-controller/arm,gic-v3.txt   |  48 +++++++++-
  drivers/irqchip/irq-gic-v2m.c                      | 102 ++++++++++++++++-----
  drivers/irqchip/irq-gic-v3.c                       |   4 +
  include/linux/irqchip/arm-gic-common.h             |   3 +
  4 files changed, 129 insertions(+), 28 deletions(-)

What's the plan on this?
I have not seen this patch in rc1 or in next.

We have a dependency on this to get WLAN working on DragonBoard820c.


thanks,
Srini

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