On Tue, Mar 06, 2018 at 01:40:02PM +0100, Pavel Machek wrote: > Hi! > > > Signed-off-by: Jae Hyun Yoo <jae.hyun....@linux.intel.com> > > --- > > .../devicetree/bindings/peci/peci-aspeed.txt | 73 > > ++++++++++++++++++++++ > > 1 file changed, 73 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt > > > > diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt > > b/Documentation/devicetree/bindings/peci/peci-aspeed.txt > > new file mode 100644 > > index 000000000000..8a86f346d550 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/peci/peci-aspeed.txt > > @@ -0,0 +1,73 @@ > > +Device tree configuration for PECI buses on the AST24XX and AST25XX SoCs. > > Are these SoCs x86-based?
ARM, as far as i can tell. If i get the architecture correct, these are BMC, Board Management Controllers, looking after the main x86 CPU, stopping it overheating, controlling the power supplies, remote management, etc. Andrew