On Tue, Mar 06, 2018 at 01:33:00PM -0600, Shanker Donthineni wrote: > > I also confirmed with Thomas Speier, we can skip __flush_icache_all() if > > DIC=1.
Thanks, > Planning to patch __flush_icache_all() itself instead of changing the > callers. This > way we can avoid "ic ialluis" completely. Is this okay for you? > > static inline void __flush_icache_all(void) > { > /* Instruction cache invalidation is not required for I/D coherence? */ > if (!cpus_have_const_cap(ARM64_HAS_CACHE_DIC)) { > asm("ic ialluis"); > dsb(ish); > } > } Yup, that's what I meant, cheers. Will