[PATCH AUTOSEL for 4.9 104/190] gpio: gpio-wcove: fix GPIO IRQ status mask

[Sasha Levin]

From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppusw...@linux.intel.com>

[ Upstream commit 881ebd229f4a5ea88f269c1225245e50db9ba303 ]

According to Whiskey Cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
battery IO. So we should skip this bit when checking for GPIO IRQ pending
status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
loop until IRQ "pending" status becomes 0. This patch fixes this issue.

Signed-off-by: Kuppuswamy Sathyanarayanan 
<sathyanarayanan.kuppusw...@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerb...@linux.intel.com>
Acked-by: Andy Shevchenko <andy.shevche...@gmail.com>
Signed-off-by: Linus Walleij <linus.wall...@linaro.org>
Signed-off-by: Sasha Levin <alexander.le...@microsoft.com>
---
 drivers/gpio/gpio-wcove.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c
index 1012c86925ad..5ef4980f3f14 100644
--- a/drivers/gpio/gpio-wcove.c
+++ b/drivers/gpio/gpio-wcove.c
@@ -51,6 +51,8 @@
 #define GROUP1_NR_IRQS         6
 #define IRQ_MASK_BASE          0x4e19
 #define IRQ_STATUS_BASE                0x4e0b
+#define GPIO_IRQ0_MASK         GENMASK(6, 0)
+#define GPIO_IRQ1_MASK         GENMASK(5, 0)
 #define UPDATE_IRQ_TYPE                BIT(0)
 #define UPDATE_IRQ_MASK                BIT(1)
 
@@ -310,7 +312,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void 
*data)
                return IRQ_NONE;
        }
 
-       pending = p[0] | (p[1] << 8);
+       pending = (p[0] & GPIO_IRQ0_MASK) | ((p[1] & GPIO_IRQ1_MASK) << 7);
        if (!pending)
                return IRQ_NONE;
 
@@ -334,7 +336,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void 
*data)
                        break;
                }
 
-               pending = p[0] | (p[1] << 8);
+               pending = (p[0] & GPIO_IRQ0_MASK) | ((p[1] & GPIO_IRQ1_MASK) << 
7);
        }
 
        return IRQ_HANDLED;
-- 
2.14.1