Am Dienstag, 13. März 2018, 21:37:19 CET schrieb Derek Basehore: > We need this rate to generate 100, 200, and 228.57MHz from the same > PLL. 228.57MHz is useful for a pixel clock when the VPLL is used for > and external display. > > Signed-off-by: Derek Basehore <dbaseh...@chromium.org>
applied for 4.17 Thanks Heiko
