Hi, > -----Original Message----- > From: Michal Simek [mailto:michal.si...@xilinx.com] > Sent: Friday, November 16, 2018 6:04 PM > To: Martin Lund <martin.l...@keep-it-simple.com>; Naga Sureshkumar Relli > <nagas...@xilinx.com> > Cc: boris.brezil...@bootlin.com; miquel.ray...@bootlin.com; rich...@nod.at; > David > Woodhouse <dw...@infradead.org>; Brian Norris <computersforpe...@gmail.com>; > Marek > VaĊĦut <marek.va...@gmail.com>; naga sureshkumar <nagasures...@gmail.com>; > linux- > m...@lists.infradead.org; linux-kernel@vger.kernel.org; r...@kernel.org > Subject: Re: [LINUX PATCH v12 1/3] dt-bindings: mtd: arasan: Add device tree > binding > documentation > > On 16. 11. 18 12:50, Martin Lund wrote: > > Hi Naga, > > > > I've been working on running up the latest kernel (v4.20-rc2) on our > > custom Xilinx hw board so that I can test the v12 version of your > > Arasan nand driver. > > > > I've managed to get the driver successfully up and running and ready > > for testing with a Micron MT29F64G08AFAAAWP device. However, setting > > it up I've found a few inaccuracies in the documentation of the device > > tree bindings. > > > > This is the device configuration that ended up working for me with > > linux v4.20-rc2: > > > > nfc: nand@ff100000 { > > compatible = "xlnx,zynqmp-nand", "arasan,nfc-v3p10"; > > reg = <0x0 0xff100000 0x0 0x1000>; > > clock-names = "clk_sys", "clk_flash"; > > clocks = <&clk200>, <&clk100>; > > interrupt-parent = <&gic>; > > interrupts = <0 14 4>; > > #address-cells = <1>; > > #size-cells = <0>; > > > > nand@0 { > > reg = <0>; > > nand-ecc-mode = "hw"; > > }; > > }; > > > > Compared with the example you will notice that "clock-name" should be > > "clock-names". reg was missing a "0x0". > > clock-names and even that names - you are right it is not correct and should > be fixed. Clock-names I will change from "clock-name" to "clock-names". But I got some review comments previously, to use "sys" instead of "clk_sys" and "flash" instead of "clk_flash". And I have to change this in driver. I will update that.
Thanks, Naga Sureshkumar Relli > > Missing 0x0 in reg doesn't matter because it depends on address/size cells. > > > I think it is helpful to provide a real-world working example, so you > > might also consider changing the example "clocks" configuration to > > clk200/clk100 since there is no clk_misc among the clock sources of > > any of the xilinx zynqmp board device tree configurations. > > Real example is the best normally just c&p from existing dts is the way to go. > But in connection to clocks it doesn't matter what exactly should be there > and I don't think > there is any consistency in that. Hopefully this will be removed by yaml > conversion. > > Thanks, > Michal