On Mon, Nov 12, 2018 at 11:56:56AM +0000, Julien Thierry wrote: > Mask the IRQ priority through PMR and re-enable IRQs at CPU level, > allowing only higher priority interrupts to be received during interrupt > handling. > > Signed-off-by: Julien Thierry <julien.thie...@arm.com> > Cc: Catalin Marinas <catalin.mari...@arm.com> > Cc: Will Deacon <will.dea...@arm.com> > Cc: Thomas Gleixner <t...@linutronix.de> > Cc: Jason Cooper <ja...@lakedaemon.net> > Cc: Marc Zyngier <marc.zyng...@arm.com> > --- > arch/arm/include/asm/arch_gicv3.h | 17 +++++++++++++++++ > arch/arm64/include/asm/arch_gicv3.h | 17 +++++++++++++++++ > drivers/irqchip/irq-gic-v3.c | 10 ++++++++++ > 3 files changed, 44 insertions(+)
For the arm64 bits: Acked-by: Catalin Marinas <catalin.mari...@arm.com> (this time without the legal disclaimer ;))
