[PATCH v2 4/4] arm: dts: mt2701: add uart APDMA to device tree

[Long Cheng]

1. add uart APDMA controller device node
2. add uart 0/1/2/3/4/5 DMA function

Signed-off-by: Long Cheng <long.ch...@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt2712e.dtsi |   50 +++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi 
b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 976d92a..a59728b 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -300,6 +300,9 @@
                interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
                clocks = <&baud_clk>, <&sys_clk>;
                clock-names = "baud", "bus";
+               dmas = <&apdma 10
+                       &apdma 11>;
+               dma-names = "tx", "rx";
                status = "disabled";
        };
 
@@ -378,6 +381,38 @@
                status = "disabled";
        };
 
+       apdma: dma-controller@11000400 {
+               compatible = "mediatek,mt2712-uart-dma",
+                            "mediatek,mt6577-uart-dma";
+               reg = <0 0x11000400 0 0x80>,
+                     <0 0x11000480 0 0x80>,
+                     <0 0x11000500 0 0x80>,
+                     <0 0x11000580 0 0x80>,
+                     <0 0x11000600 0 0x80>,
+                     <0 0x11000680 0 0x80>,
+                     <0 0x11000700 0 0x80>,
+                     <0 0x11000780 0 0x80>,
+                     <0 0x11000800 0 0x80>,
+                     <0 0x11000880 0 0x80>,
+                     <0 0x11000900 0 0x80>,
+                     <0 0x11000980 0 0x80>;
+               interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 105 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 107 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 109 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 111 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 114 IRQ_TYPE_LEVEL_LOW>;
+               clocks = <&pericfg CLK_PERI_AP_DMA>;
+               clock-names = "apdma";
+               #dma-cells = <1>;
+       };
+
        uart0: serial@11002000 {
                compatible = "mediatek,mt2712-uart",
                             "mediatek,mt6577-uart";
@@ -385,6 +420,9 @@
                interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
                clocks = <&baud_clk>, <&sys_clk>;
                clock-names = "baud", "bus";
+               dmas = <&apdma 0
+                       &apdma 1>;
+               dma-names = "tx", "rx";
                status = "disabled";
        };
 
@@ -395,6 +433,9 @@
                interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
                clocks = <&baud_clk>, <&sys_clk>;
                clock-names = "baud", "bus";
+               dmas = <&apdma 2
+                       &apdma 3>;
+               dma-names = "tx", "rx";
                status = "disabled";
        };
 
@@ -405,6 +446,9 @@
                interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>;
                clocks = <&baud_clk>, <&sys_clk>;
                clock-names = "baud", "bus";
+               dmas = <&apdma 4
+                       &apdma 5>;
+               dma-names = "tx", "rx";
                status = "disabled";
        };
 
@@ -415,6 +459,9 @@
                interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_LOW>;
                clocks = <&baud_clk>, <&sys_clk>;
                clock-names = "baud", "bus";
+               dmas = <&apdma 6
+                       &apdma 7>;
+               dma-names = "tx", "rx";
                status = "disabled";
        };
 
@@ -629,6 +676,9 @@
                interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_LOW>;
                clocks = <&baud_clk>, <&sys_clk>;
                clock-names = "baud", "bus";
+               dmas = <&apdma 8
+                       &apdma 9>;
+               dma-names = "tx", "rx";
                status = "disabled";
        };
 
-- 
1.7.9.5