Add the binding doc for nxp system counter timer module.

Signed-off-by: Bai Ping <[email protected]>
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change v1->v2
 - remove the blank line at EOF
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 .../devicetree/bindings/timer/nxp,sysctr_timer.txt | 26 ++++++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/nxp,sysctr_timer.txt

diff --git a/Documentation/devicetree/bindings/timer/nxp,sysctr_timer.txt 
b/Documentation/devicetree/bindings/timer/nxp,sysctr_timer.txt
new file mode 100644
index 0000000..21f1527
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/nxp,sysctr_timer.txt
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+NXP System Counter Module(sys_ctr)
+
+The system counter(sys_ctr) is a programmable system counter which provides
+a shared time base to Cortex A15, A7, A53, A73, etc. it is intended for use in
+applications where the counter is always powered and support multiple,
+unrelated clocks.
+
+Required properties:
+
+- compatible :      should be "nxp,sysctr-timer"
+- reg :             Specifies the base physical address and size of the comapre
+                    frame and the counter control, read & compare.
+- interrupts :      should be the compare frames' interrupt
+- clock-frequency : Specifies the counter clock frequency.
+
+Example:
+
+       system_counter: timer@306a0000 {
+               compatible = "nxp,sysctr-timer";
+               reg = <0x0 0x306a0000 0x0 0x10000>, /* system-counter-rd base */
+                     <0x0 0x306b0000 0x0 0x10000>, /* system-counter-cmp base 
*/
+                     <0x0 0x306c0000 0x0 0x10000>; /* system-counter-ctrl base 
*/
+               clock-frequency = <8000000>;
+               interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+       };
-- 
1.9.1

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