The PCIe IP is fed by a gated clock.

Signed-off-by: Miquel Raynal <[email protected]>
---
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi 
b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index 9f7e932c8144..854b1d59b2ca 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -418,6 +418,7 @@
                        #address-cells = <3>;
                        #size-cells = <2>;
                        bus-range = <0x00 0xff>;
+                       clocks = <&sb_periph_clk 13>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <1>;
                        msi-parent = <&pcie0>;
-- 
2.19.1

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