On Mon, Dec 17, 2018 at 08:07:02PM -0800, Andrey Smirnov wrote: > Add code needed to support i.MX8MQ variant. > > Signed-off-by: Andrey Smirnov <[email protected]> > Reviewed-by: Lucas Stach <[email protected]> > Cc: Bjorn Helgaas <[email protected]> > Cc: Fabio Estevam <[email protected]> > Cc: Chris Healy <[email protected]> > Cc: Lucas Stach <[email protected]> > Cc: Leonard Crestez <[email protected]> > Cc: "A.s. Dong" <[email protected]> > Cc: Richard Zhu <[email protected]> > Cc: Rob Herring <[email protected]> > Cc: [email protected] > Cc: [email protected] > Cc: [email protected] > Cc: [email protected] > Cc: [email protected] > --- > .../bindings/pci/fsl,imx6q-pcie.txt | 6 +- > drivers/pci/controller/dwc/Kconfig | 4 +- > drivers/pci/controller/dwc/pci-imx6.c | 82 ++++++++++++++++++- > 3 files changed, 87 insertions(+), 5 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > index d514c1f2365f..1a10c313e8d7 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > @@ -9,6 +9,7 @@ Required properties: > - "fsl,imx6sx-pcie", > - "fsl,imx6qp-pcie" > - "fsl,imx7d-pcie" > + - "fsl,imx8mq-pcie" > - reg: base address and length of the PCIe controller > - interrupts: A list of interrupt outputs of the controller. Must contain an > entry for each entry in the interrupt-names property. > @@ -45,7 +46,7 @@ Additional required properties for imx6sx-pcie: > PCIE_PHY power domains > - power-domain-names: Must be "pcie", "pcie_phy" > > -Additional required properties for imx7d-pcie: > +Additional required properties for imx7d-pcie and imx8mq-pcie: > - power-domains: Must be set to a phandle pointing to PCIE_PHY power domain > - resets: Must contain phandles to PCIe-related reset lines exposed by SRC > IP block > @@ -54,6 +55,9 @@ Additional required properties for imx7d-pcie: > - "apps" > - "turnoff" > > +Additional required properties for imx8mq-pcie: > +- fsl,controller-id: Logical ID of a given PCIE controller. PCIE1 is 0, > PCIE2 is 1; > +
Remove this. If GPR register offset is what you need, then put that into DT. Typically, we'd have a property with iomuxc phandle and offset. Rob
