On 4/16/19 10:55 AM, Andy Shevchenko wrote:
On Tue, Apr 16, 2019 at 6:10 AM Evan Green <evgr...@chromium.org> wrote:
On Tue, Apr 9, 2019 at 11:11 PM Andy Shevchenko
<andriy.shevche...@linux.intel.com> wrote:
Intel Comet Lake has the same LPSS than Intel Cannon Lake.
Add the new IDs to the list of supported devices.
static const struct pci_device_id intel_lpss_pci_ids[] = {
+ /* CML */
+ { PCI_VDEVICE(INTEL, 0x02a8), (kernel_ulong_t)&spt_uart_info },
+ { PCI_VDEVICE(INTEL, 0x02a9), (kernel_ulong_t)&spt_uart_info },
+ { PCI_VDEVICE(INTEL, 0x02aa), (kernel_ulong_t)&spt_info },
+ { PCI_VDEVICE(INTEL, 0x02ab), (kernel_ulong_t)&spt_info },
+ { PCI_VDEVICE(INTEL, 0x02c5), (kernel_ulong_t)&bxt_i2c_info },
+ { PCI_VDEVICE(INTEL, 0x02c6), (kernel_ulong_t)&bxt_i2c_info },
How come it's not cnl_i2c_info?
This is a good question, that's why Jarkko asked Lee to hold on until
we have confirmation about i2c timings.
I got confirmation I2C uses the same input clock than Cannon Lake and
matches with my measurements.
Andy: please do s/bxt_i2c_info/cnl_i2c_info/ in your patch.
--
Jarkko
