Quoting Paul Walmsley (2019-04-30 13:51:00) > Add driver code for the SiFive FU540 PRCI IP block. This IP block > handles reset and clock control for the SiFive FU540 device and > implements SoC-level clock tree controls and dividers. > > Based on code written by Wesley Terpstra <[email protected]>: > https://github.com/riscv/riscv-linux/commit/999529edf517ed75b56659d456d221b2ee56bb60 > > Boot and PLL rate change were tested on a SiFive HiFive Unleashed > board. > > This version includes several changes requested by Stephen Boyd > <[email protected]>. > > Signed-off-by: Paul Walmsley <[email protected]> > Signed-off-by: Paul Walmsley <[email protected]> > Cc: Michael Turquette <[email protected]> > Cc: Stephen Boyd <[email protected]> > Cc: Albert Ou <[email protected]> > Cc: Wesley W. Terpstra <[email protected]> > Cc: Palmer Dabbelt <[email protected]> > Cc: Megan Wachs <[email protected]> > Cc: [email protected] > Cc: [email protected] > Cc: [email protected] > ---
Applied to clk-next
