14.06.2019 13:47, Thierry Reding пишет: > From: Thierry Reding <[email protected]> > > The rating is parameterized depending on SoC generation to make sure it > takes precedence on implementations where the architected timer can't be > used. This rating is already used for the clock event device. Use the > same rating for the clock source to be consistent. > > Signed-off-by: Thierry Reding <[email protected]> > --- > drivers/clocksource/timer-tegra.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clocksource/timer-tegra.c > b/drivers/clocksource/timer-tegra.c > index f6a8eb0d7322..e6608141cccb 100644 > --- a/drivers/clocksource/timer-tegra.c > +++ b/drivers/clocksource/timer-tegra.c > @@ -318,7 +318,7 @@ static int __init tegra_init_timer(struct device_node > *np, bool tegra20, > sched_clock_register(tegra_read_sched_clock, 32, TIMER_1MHz); > > ret = clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US, > - "timer_us", TIMER_1MHz, 300, 32, > + "timer_us", TIMER_1MHz, rating, 32, > clocksource_mmio_readl_up); > if (ret) > pr_err("failed to register clocksource: %d\n", ret); >
Looks good. Although, could you please clarify whether arch-timer stops on T210 when CPU enters deepest (powerdown) idle state? I'm starting to lose track a bit already. Because if arch-timer stops in the deepest idle state, then it's a bit odd that Joseph didn't add the clocksource for T210 in the first place and v5.1 probably shouldn't work well because of that already.
