On Wed, Jul 10, 2019 at 01:33:48PM +0200, Thomas Gleixner wrote: > On Wed, 10 Jul 2019, Paolo Bonzini wrote: > > On 08/07/19 21:32, Lendacky, Thomas wrote: > > >> AMD and Intel both have serializing lfence (X86_FEATURE_LFENCE_RDTSC). > > >> They've both had it for a long time, and AMD has had it enabled in Linux > > >> since Spectre v1 was announced. > > >> > > >> Back then, there was a proposal to remove the serializing mfence feature > > >> bit (X86_FEATURE_MFENCE_RDTSC), since both AMD and Intel have > > >> serializing lfence. At the time, it was (ahem) speculated that some > > >> hypervisors might not yet support its removal, so it remained for the > > >> time being. > > >> > > >> Now a year-and-a-half later, it should be safe to remove. > > > > > > I vaguely remember a concern from a migration point of view, maybe? Adding > > > Paolo to see if he has any concerns. > > > > It would be a problem to remove the conditional "if > > (boot_cpu_has(X86_FEATURE_LFENCE_RDTSC))" from svm_get_msr_feature. But > > removing support for X86_FEATURE_MFENCE_RDTSC essentially amounts to > > removing support for hypervisors that haven't been updated pre-Spectre. > > That's fair enough, I think. > > Yes, they have other more interesting problems :)
Great. Anyone care to give an ACK? :-) -- Josh
