On 9/9/19 9:52 AM, Vitaly Gaiduk wrote: > This patch adds ability to switch beetween two PHY SGMII modes. > Some hardware, for example, FPGA IP designs may use 6-wire mode > which enables differential SGMII clock to MAC. > > Signed-off-by: Vitaly Gaiduk <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]> -- Florian
