Add the power domain supporting performance state and the corresponding
OPP tables for the sdhc device on sdm845.

Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi 
b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index db5b3b3..bcd0e6f 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -390,6 +390,20 @@
                        };
                };
 
+               sdhc1_opp_table: sdhc1-opp-table {
+                       compatible = "operating-points-v2";
+
+                       opp-100000000 {
+                               opp-hz = /bits/ 64 <100000000>;
+                               required-opps = <&rpmhpd_opp_low_svs>;
+                       };
+
+                       opp-384000000 {
+                               opp-hz = /bits/ 64 <384000000>;
+                               required-opps = <&rpmhpd_opp_svs_l1>;
+                       };
+               };
+
                sdhc_1: sdhci@7c4000 {
                        compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
                        reg = <0 0x7c4000 0 0x1000>,
@@ -404,6 +418,8 @@
                        clocks = <&gcc GCC_SDCC1_APPS_CLK>,
                                        <&gcc GCC_SDCC1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       power-domains = <&rpmhpd SC7180_CX>;
+                       operating-points-v2 = <&sdhc1_opp_table>;
 
                        bus-width = <8>;
                        non-removable;
-- 
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