Looks good.

> -----Original Message-----
> From: James Morse <[email protected]>
> Sent: Monday, May 18, 2020 8:19 AM
> To: [email protected]; [email protected]
> Cc: Fenghua Yu <[email protected]>; Reinette Chatre
> <[email protected]>; Thomas Gleixner <[email protected]>; Ingo
> Molnar <[email protected]>; Borislav Petkov <[email protected]>; H Peter Anvin
> <[email protected]>; Moger, Babu <[email protected]>; James Morse
> <[email protected]>
> Subject: [PATCH v3 07/10] x86/resctrl: Add arch_needs_linear to explain
> AMD/Intel MBA difference
> 
> The configuration values user-space provides to the resctrl filesystem
> are ABI. To make this work on another architecture we want to move all
> the ABI bits out of /arch/x86 and under /fs.
> 
> To do this, the differences between AMD and Intel CPUs needs to be
> explained to resctrl via resource properties, instead of function
> pointers that let the arch code accept subtly different values on
> different platforms/architectures.
> 
> For MBA, Intel CPUs reject configuration attempts for non-linear
> resources, whereas AMD ignore this field as its MBA resource is never
> linear. To merge the parse/validate functions we need to explain
> this difference.
> 
> Add arch_needs_linear to indicate the arch code needs the linear
> property to be true to configure this resource. AMD can set this
> and delay_linear to false. Intel can set arch_needs_linear
> to true to keep the existing "No support for non-linear MB domains"
> error message for affected platforms.
> 
> CC: Babu Moger <[email protected]>
> Signed-off-by: James Morse <[email protected]>
> Reviewed-by: Reinette Chatre <[email protected]>

Reviewed-by: Babu Moger <[email protected]>

> 
> ---
> An alternative to this is for Intel non-linear MBA resources to
> clear alloc_capable as they can't be configured anyway.
> ---
>  arch/x86/kernel/cpu/resctrl/core.c        | 3 +++
>  arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 8 +++++++-
>  arch/x86/kernel/cpu/resctrl/internal.h    | 2 ++
>  3 files changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kernel/cpu/resctrl/core.c
> b/arch/x86/kernel/cpu/resctrl/core.c
> index e1fed3928b59..c6b73b0ee070 100644
> --- a/arch/x86/kernel/cpu/resctrl/core.c
> +++ b/arch/x86/kernel/cpu/resctrl/core.c
> @@ -260,6 +260,7 @@ static bool __get_mem_config_intel(struct rdt_resource
> *r)
>       r->num_closid = edx.split.cos_max + 1;
>       max_delay = eax.split.max_delay + 1;
>       r->default_ctrl = MAX_MBA_BW;
> +     r->membw.arch_needs_linear = true;
>       if (ecx & MBA_IS_LINEAR) {
>               r->membw.delay_linear = true;
>               r->membw.min_bw = MAX_MBA_BW - max_delay;
> @@ -267,6 +268,7 @@ static bool __get_mem_config_intel(struct rdt_resource
> *r)
>       } else {
>               if (!rdt_get_mb_table(r))
>                       return false;
> +             r->membw.arch_needs_linear = false;
>       }
>       r->data_width = 3;
> 
> @@ -288,6 +290,7 @@ static bool __rdt_get_mem_config_amd(struct
> rdt_resource *r)
> 
>       /* AMD does not use delay */
>       r->membw.delay_linear = false;
> +     r->membw.arch_needs_linear = false;
> 
>       r->membw.min_bw = 0;
>       r->membw.bw_gran = 1;
> diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
> b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
> index 934c8fb8a64a..e3bcd77add2b 100644
> --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
> +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
> @@ -33,6 +33,12 @@ static bool bw_validate_amd(char *buf, unsigned long
> *data,
>       unsigned long bw;
>       int ret;
> 
> +     /* temporary: always false on AMD */
> +     if (!r->membw.delay_linear && r->membw.arch_needs_linear) {
> +             rdt_last_cmd_puts("No support for non-linear MB domains\n");
> +             return false;
> +     }
> +
>       ret = kstrtoul(buf, 10, &bw);
>       if (ret) {
>               rdt_last_cmd_printf("Non-decimal digit in MB value %s\n", buf);
> @@ -82,7 +88,7 @@ static bool bw_validate(char *buf, unsigned long *data,
> struct rdt_resource *r)
>       /*
>        * Only linear delay values is supported for current Intel SKUs.
>        */
> -     if (!r->membw.delay_linear) {
> +     if (!r->membw.delay_linear && r->membw.arch_needs_linear) {
>               rdt_last_cmd_puts("No support for non-linear MB domains\n");
>               return false;
>       }
> diff --git a/arch/x86/kernel/cpu/resctrl/internal.h
> b/arch/x86/kernel/cpu/resctrl/internal.h
> index dd51e23e346b..0b288b6fefd9 100644
> --- a/arch/x86/kernel/cpu/resctrl/internal.h
> +++ b/arch/x86/kernel/cpu/resctrl/internal.h
> @@ -370,6 +370,7 @@ struct rdt_cache {
>   * struct rdt_membw - Memory bandwidth allocation related data
>   * @min_bw:          Minimum memory bandwidth percentage user can
> request
>   * @bw_gran:         Granularity at which the memory bandwidth is allocated
> + * @arch_needs_linear:       True if we can't configure non-linear resources
>   * @delay_linear:    True if memory B/W delay is in linear scale
>   * @mba_sc:          True if MBA software controller(mba_sc) is enabled
>   * @mb_map:          Mapping of memory B/W percentage to memory B/W
> delay
> @@ -378,6 +379,7 @@ struct rdt_membw {
>       u32             min_bw;
>       u32             bw_gran;
>       u32             delay_linear;
> +     bool            arch_needs_linear;
>       bool            mba_sc;
>       u32             *mb_map;
>  };
> --
> 2.19.1

Reply via email to