On Tue, May 26, 2020 at 06:41:18PM +0300, Serge Semin wrote: > DW Watchdog IP core can be synthesised with asynchronous timer/APB > clocks support (WDT_ASYNC_CLK_MODE_ENABLE == 1). In this case > separate clock signals are supposed to be used to feed watchdog timer > and APB interface of the device. Let's update the DW Watchdog DT node > schema so it would support the optional APB3 bus clock specified along > with the mandatory watchdog timer reference clock. > > Signed-off-by: Serge Semin <[email protected]> > Reviewed-by: Rob Herring <[email protected]> > Cc: Alexey Malahov <[email protected]> > Cc: Thomas Bogendoerfer <[email protected]> > Cc: Arnd Bergmann <[email protected]> > Cc: [email protected]
Reviewed-by: Guenter Roeck <[email protected]> > --- > > Changelog v2: > - It's a new patch unpinned from the previous one. > --- > .../devicetree/bindings/watchdog/snps,dw-wdt.yaml | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml > b/Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml > index 4f6944756ab4..5bf6dc6377f3 100644 > --- a/Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml > +++ b/Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml > @@ -24,8 +24,16 @@ properties: > maxItems: 1 > > clocks: > + minItems: 1 > items: > - description: Watchdog timer reference clock > + - description: APB3 interface clock > + > + clock-names: > + minItems: 1 > + items: > + - const: tclk > + - const: pclk > > resets: > description: Phandle to the DW Watchdog reset lane
