On Thu, Jun 18, 2020 at 2:43 AM Serge Semin <[email protected]> wrote: > > Modern device tree bindings are supposed to be created as YAML-files > in accordance with dt-schema. This commit replaces the Synopsis > Designware DMA controller legacy bare text bindings with YAML file. > The only required prorties are "compatible", "reg", "#dma-cells" and > "interrupts", which will be used by the driver to correctly find the > controller memory region and handle its events. The rest of the properties > are optional, since in case if either "dma-channels" or "dma-masters" isn't > specified, the driver will attempt to auto-detect the IP core > configuration. > > Signed-off-by: Serge Semin <[email protected]> > Reviewed-by: Rob Herring <[email protected]> > Acked-by: Viresh Kumar <[email protected]> > Cc: Alexey Malahov <[email protected]> > Cc: Thomas Bogendoerfer <[email protected]> > Cc: Arnd Bergmann <[email protected]> > Cc: Andy Shevchenko <[email protected]> > Cc: [email protected]
Rob, here are questions to you. > + dma-channels: > + description: | > + Number of DMA channels supported by the controller. In case if > + not specified the driver will try to auto-detect this and > + the rest of the optional parameters. > + minimum: 1 > + maximum: 8 ... > + multi-block: > + maxItems: 8 This maximum is defined by above dma-channels property. Is there any way to put it in the schema? ... > + snps,dma-protection-control: > + $ref: /schemas/types.yaml#definitions/uint32 > + description: | > + Bits one-to-one passed to the AHB HPROT[3:1] bus. Each bit setting > + indicates the following features: bit 0 - privileged mode, > + bit 1 - DMA is bufferable, bit 2 - DMA is cacheable. > + default: 0 > + minimum: 0 > + maximum: 7 AFAIR this is defined by bit flags, does schema have a mechanism to define flags-like entries? -- With Best Regards, Andy Shevchenko
