Add the power domain supporting performance state and the corresponding
OPP tables for the sdhc device on sc7180.

Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi 
b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 78fef54..08ee49a 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -524,6 +524,8 @@
                        clocks = <&gcc GCC_SDCC1_APPS_CLK>,
                                        <&gcc GCC_SDCC1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       power-domains = <&rpmhpd SC7180_CX>;
+                       operating-points-v2 = <&sdhc1_opp_table>;
 
                        bus-width = <8>;
                        non-removable;
@@ -535,6 +537,20 @@
                        mmc-hs400-enhanced-strobe;
 
                        status = "disabled";
+
+                       sdhc1_opp_table: sdhc1-opp-table {
+                               compatible = "operating-points-v2";
+
+                               opp-100000000 {
+                                       opp-hz = /bits/ 64 <100000000>;
+                                       required-opps = <&rpmhpd_opp_low_svs>;
+                               };
+
+                               opp-384000000 {
+                                       opp-hz = /bits/ 64 <384000000>;
+                                       required-opps = <&rpmhpd_opp_svs_l1>;
+                               };
+                       };
                };
 
                qup_opp_table: qup-opp-table {
@@ -2300,10 +2316,26 @@
                        clocks = <&gcc GCC_SDCC2_APPS_CLK>,
                                        <&gcc GCC_SDCC2_AHB_CLK>;
                        clock-names = "core", "iface";
+                       power-domains = <&rpmhpd SC7180_CX>;
+                       operating-points-v2 = <&sdhc2_opp_table>;
 
                        bus-width = <4>;
 
                        status = "disabled";
+
+                       sdhc2_opp_table: sdhc2-opp-table {
+                               compatible = "operating-points-v2";
+
+                               opp-100000000 {
+                                       opp-hz = /bits/ 64 <100000000>;
+                                       required-opps = <&rpmhpd_opp_low_svs>;
+                               };
+
+                               opp-202000000 {
+                                       opp-hz = /bits/ 64 <202000000>;
+                                       required-opps = <&rpmhpd_opp_svs_l1>;
+                               };
+                       };
                };
 
                qspi: spi@88dc000 {
-- 
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