Board designers are now able to choose between all three supported
enet clocking methods, by changing the clocktree via the devicetree:
a) route enet_ref externally from pad to pad (the default):
no clock tree changes required
b) route internally on SoC from enet_ref
&fec {
assigned-clocks = <&clks IMX6QDL_CLK_ENET_PTP>,
<&clks IMX6QDL_CLK_ENET_REF>;
assigned-clock-parents = <&clks IMX6QDL_CLK_ENET_REF>;
assigned-clock-rates = <0>, <125000000>;
};
c) route external clock (from PHY or oscillator) via pad
/ {
clocks {
phy_osc: anaclk3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
};
};
&fec {
assigned-clocks = <&clks IMX6QDL_CLK_ENET_PTP>,
<&clks IMX6QDL_CLK_ENET_PAD>;
assigned-clock-parents = <&clks IMX6QDL_CLK_ENET_PAD>,
<&clks IMX6QDL_CLK_ANACLK3>;
};
Signed-off-by: Sven Van Asbroeck <thesve...@gmail.com>
---
Tree: v5.8-rc4
To: Shawn Guo <shawn...@kernel.org>
To: Sascha Hauer <s.ha...@pengutronix.de>
Cc: Pengutronix Kernel Team <ker...@pengutronix.de>
Cc: Fabio Estevam <feste...@gmail.com>
Cc: NXP Linux Team <linux-...@nxp.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-...@vger.kernel.org
arch/arm/boot/dts/imx6qp.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi
index b310f13a53f2..7f81d35f56c9 100644
--- a/arch/arm/boot/dts/imx6qp.dtsi
+++ b/arch/arm/boot/dts/imx6qp.dtsi
@@ -79,6 +79,9 @@
&fec {
interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>,
<0 119 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6QDL_CLK_ENET>,
+ <&clks IMX6QDL_CLK_ENET>,
+ <&clks IMX6QDL_CLK_ENET_PTP>;
};
&gpc {
--
2.17.1
