Ray Jui <ray....@broadcom.com> wrote:
> > On 7/22/2020 3:41 AM, Wolfram Sang wrote: > > > >>> + synchronize_irq(iproc_i2c->irq); > >> > >> If one takes a look at the I2C slave ISR routine, there are places where > >> IRQ can be re-enabled in the ISR itself. What happens after we mask all > >> slave interrupt and when 'synchronize_irq' is called, which I suppose is > >> meant to wait for inflight interrupt to finish where there's a chance > >> the interrupt can be re-enable again? How is one supposed to deal with > >> that? > > > > I encountered the same problem with the i2c-rcar driver before I left > > for my holidays. > > > > I think the following sequence needs to be implemented to make this > safe, i.e., after 'synchronize_irq', no further slave interrupt will be > fired. > > In 'bcm_iproc_i2c_unreg_slave': > > 1. Set an atomic variable 'unreg_slave' (I'm bad in names so please come > up with a better name than this) > > 2. Disable all slave interrupts > > 3. synchronize_irq > > 4. Set slave to NULL > > 5. Erase slave addresses > > In the ISR routine, it should always check against 'unreg_slave' before > enabling any slave interrupt. If 'unreg_slave' is set, no slave > interrupt should be re-enabled from within the ISR. > > I think the above sequence can ensure no further slave interrupt after > 'synchronize_irq'. I suggested using an atomic variable instead of > variable + spinlock due to the way how sync irq works, i.e., "If you use > this function while holding a resource the IRQ handler may need you will > deadlock.". > > Thanks, > > Ray > > >>> + iproc_i2c->slave = NULL; > >>> + > >>> /* Erase the slave address programmed */ > >>> tmp = iproc_i2c_rd_reg(iproc_i2c, S_CFG_SMBUS_ADDR_OFFSET); > >>> tmp &= ~BIT(S_CFG_EN_NIC_SMB_ADDR3_SHIFT); > >>>
