[PATCH v4 11/12] PCI/ASPM: Check if pcie_capability_read_*() reads ~0

[Saheed O. Bolarinwa]

On failure pcie_capability_read_*() sets it's last parameter, val
to 0. However, with Patch 12/12, it is possible that val is set
to ~0 on failure. This would introduce a bug because
(x & x) == (~0 & x).

Since ~0 is an invalid value in here,

Add extra check for ~0 to the if condition to confirm failure.

Suggested-by: Bjorn Helgaas <bj...@helgaas.com>
Signed-off-by: Saheed O. Bolarinwa <refactormys...@gmail.com>
---
 drivers/pci/pcie/aspm.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index b17e5ffd31b1..5e84a5ee94b0 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -223,7 +223,7 @@ static bool pcie_retrain_link(struct pcie_link_state *link)
        end_jiffies = jiffies + LINK_RETRAIN_TIMEOUT;
        do {
                pcie_capability_read_word(parent, PCI_EXP_LNKSTA, &reg16);
-               if (!(reg16 & PCI_EXP_LNKSTA_LT))
+               if ((reg16 == (u16)~0) || !(reg16 & PCI_EXP_LNKSTA_LT))
                        break;
                msleep(1);
        } while (time_before(jiffies, end_jiffies));
@@ -250,23 +250,23 @@ static void pcie_aspm_configure_common_clock(struct 
pcie_link_state *link)
 
        /* Check downstream component if bit Slot Clock Configuration is 1 */
        pcie_capability_read_word(child, PCI_EXP_LNKSTA, &reg16);
-       if (!(reg16 & PCI_EXP_LNKSTA_SLC))
+       if ((reg16 == (u16)~0) || !(reg16 & PCI_EXP_LNKSTA_SLC))
                same_clock = 0;
 
        /* Check upstream component if bit Slot Clock Configuration is 1 */
        pcie_capability_read_word(parent, PCI_EXP_LNKSTA, &reg16);
-       if (!(reg16 & PCI_EXP_LNKSTA_SLC))
+       if ((reg16 == (u16)~0) || !(reg16 & PCI_EXP_LNKSTA_SLC))
                same_clock = 0;
 
        /* Port might be already in common clock mode */
        pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &reg16);
-       if (same_clock && (reg16 & PCI_EXP_LNKCTL_CCC)) {
+       if ((reg16 != (u16)~0) && same_clock && (reg16 & PCI_EXP_LNKCTL_CCC)) {
                bool consistent = true;
 
                list_for_each_entry(child, &linkbus->devices, bus_list) {
                        pcie_capability_read_word(child, PCI_EXP_LNKCTL,
                                                  &reg16);
-                       if (!(reg16 & PCI_EXP_LNKCTL_CCC)) {
+                       if ((reg16 == (u16)~0) || !(reg16 & 
PCI_EXP_LNKCTL_CCC)) {
                                consistent = false;
                                break;
                        }
-- 
2.18.4