The DDR PMU on i.MX 8MP has its own compatible described in bindings and
used in the driver (with its own quirks).  Remove additional
fsl,imx8m-ddr-pmu compatible to fix dtbs_check warnings like:

  arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dt.yaml: ddr-pmu@3d800000:
    compatible: ['fsl,imx8mq-ddr-pmu', 'fsl,imx8m-ddr-pmu'] is not valid under 
any of the given schemas (Possible causes of the failure):
    arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dt.yaml: ddr-pmu@3d800000: 
compatible: ['fsl,imx8mq-ddr-pmu', 'fsl,imx8m-ddr-pmu'] is too long
    From schema: Docmentation/devicetree/bindings/perf/fsl-imx-ddr.yaml

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi 
b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 9de2aa1c573c..e34eff19fcae 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -746,7 +746,7 @@
                };
 
                ddr-pmu@3d800000 {
-                       compatible = "fsl,imx8mp-ddr-pmu", "fsl,imx8m-ddr-pmu";
+                       compatible = "fsl,imx8mp-ddr-pmu";
                        reg = <0x3d800000 0x400000>;
                        interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
                };
-- 
2.17.1

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