The USDHC on i.MX 8QXP has its own compatible described in bindings
and used in the driver (with its own quirks).  Remove additional
fsl,imx7d-usdhc compatible to fix dtbs_check warnings like:

  arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dt.yaml: mmc@5b010000:
    compatible: ['fsl,imx8qxp-usdhc', 'fsl,imx7d-usdhc'] is too long
    From schema: /ocumentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml

  arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dt.yaml: mmc@5b010000:
    compatible: Additional items are not allowed ('fsl,imx7d-usdhc' was 
unexpected)

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
 arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi 
b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 61bccb69f09e..26c4fcdfe290 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -362,7 +362,7 @@
                };
 
                usdhc1: mmc@5b010000 {
-                       compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
+                       compatible = "fsl,imx8qxp-usdhc";
                        interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
                        reg = <0x5b010000 0x10000>;
                        clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC0_IPG_CLK>,
@@ -374,7 +374,7 @@
                };
 
                usdhc2: mmc@5b020000 {
-                       compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
+                       compatible = "fsl,imx8qxp-usdhc";
                        interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
                        reg = <0x5b020000 0x10000>;
                        clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC1_IPG_CLK>,
@@ -388,7 +388,7 @@
                };
 
                usdhc3: mmc@5b030000 {
-                       compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
+                       compatible = "fsl,imx8qxp-usdhc";
                        interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
                        reg = <0x5b030000 0x10000>;
                        clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC2_IPG_CLK>,
-- 
2.17.1

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