> From: Lu Baolu <baolu...@linux.intel.com> > Sent: Friday, August 28, 2020 8:06 AM > > The VT-d spec requires (10.4.4 Global Command Register, GCMD_REG > General > Description) that: > > If multiple control fields in this register need to be modified, software > must serialize the modifications through multiple writes to this register. > > However, in irq_remapping.c, modifications of IRE and CFI are done in one > write. We need to do two separate writes with STS checking after each. It > also checks the status register before writing command register to avoid > unnecessary register write. > > Fixes: af8d102f999a4 ("x86/intel/irq_remapping: Clean up x2apic opt-out > security warning mess") > Cc: Andy Lutomirski <l...@amacapital.net> > Cc: Jacob Pan <jacob.jun....@linux.intel.com> > Cc: Kevin Tian <kevin.t...@intel.com> > Cc: Ashok Raj <ashok....@intel.com> > Signed-off-by: Lu Baolu <baolu...@linux.intel.com> > --- > drivers/iommu/intel/irq_remapping.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > Change log: > v1->v2: > - v1 posted here > https://lore.kernel.org/linux-iommu/20200826025825.2322-1- > baolu...@linux.intel.com/ > - Add status check before disabling CFI (Kevin) > v2->v3: > - v2 posted here > https://lore.kernel.org/linux-iommu/20200827042513.30292-1- > baolu...@linux.intel.com/ > - Remove unnecessary register read (Kevin) > > diff --git a/drivers/iommu/intel/irq_remapping.c > b/drivers/iommu/intel/irq_remapping.c > index 9564d23d094f..a91dd997d268 100644 > --- a/drivers/iommu/intel/irq_remapping.c > +++ b/drivers/iommu/intel/irq_remapping.c > @@ -507,12 +507,18 @@ static void iommu_enable_irq_remapping(struct > intel_iommu *iommu) > > /* Enable interrupt-remapping */ > iommu->gcmd |= DMA_GCMD_IRE; > - iommu->gcmd &= ~DMA_GCMD_CFI; /* Block compatibility-format > MSIs */ > writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG); > - > IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, > readl, (sts & DMA_GSTS_IRES), sts); > > + /* Block compatibility-format MSIs */ > + if (sts & DMA_GSTS_CFIS) { > + iommu->gcmd &= ~DMA_GCMD_CFI; > + writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG); > + IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, > + readl, !(sts & DMA_GSTS_CFIS), sts); > + } > + > /* > * With CFI clear in the Global Command register, we should be > * protected from dangerous (i.e. compatibility) interrupts > -- > 2.17.1
Reviewed-by: Kevin Tian <kevin.t...@intel.com>