On Wed, Sep 02, 2020 at 05:40:18PM +0200, Borislav Petkov wrote:
> On Thu, Aug 27, 2020 at 03:49:03PM +0800, Feng Tang wrote:
> > output of the tool
> > ------------------
> > 
> >     CPUID leafs total: 28
> > 
> >     cpu family      : 6
> >     model           : 13
> >     stepping        : 7
> 
> Yeah, this should dump model etc and those numbers should be in hex and
> additionally in dec if people prefer them.

Ok

> >     CPU features
> >     ------------
> >      sse3
> >      pclmlqdq
> >      dtes64
> >      mwait
> >      ds_cpl
> >      vmx
> >      smx
> >      fpu
> >      ...
> 
> I guess that's good for grepping. With a lot of leafs, leaf output
> should probably be controlled by cmdline opts.

Will add input option for specific leafs or all.

> >  tools/arch/x86/tools/kcpuid/Makefile |  21 ++
> >  tools/arch/x86/tools/kcpuid/kcpuid.c | 422 
> > +++++++++++++++++++++++++++++++++++
> >  2 files changed, 443 insertions(+)
> >  create mode 100644 tools/arch/x86/tools/kcpuid/Makefile
> >  create mode 100644 tools/arch/x86/tools/kcpuid/kcpuid.c
> 
> Let's drop the second "tools" from the path:
> 
> tools/arch/x86/kcpuid/Makefile
> tools/arch/x86/kcpuid/kcpuid.c

Will do.

> > +struct reg_01_a {
> > +   u32 stepping: 4;        /* bit 0 */
> > +   u32 model: 4;
> > +   u32 family: 4;
> > +   u32 type: 2;
> > +   u32 pad1: 2;
> > +   u32 model_ext: 4;       /* bit 16 */
> > +   u32 family_ext: 8;
> > +};
> 
> Yeah, instead of defining a separate struct for each leaf I think it
> would be smarter/better to have a text file in a machine parseable
> format which defines your leafs.
> 
> When you need to add a new leaf, you simply extend the text file and the
> tool parses it anew and has its all CPUID info uptodate. This way you
> won't even have to recompile it. Adding new CPUID leafs would be adding new
> lines to the file.
> 
> For example:
> 
> LEAF<num>,SUBLEAF<num>,[EAX,EBX,ECX,EDX]{[width]<Mnemonic>|<Long text>,...}
> 
> LEAF07,SUBLEAF00,EAX{[31:0]max_value|Max input value for supported subleafs}
> LEAF07,SUBLEAF00,EBX{[0]FSGSBASE|RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE if 1.,
>                    [1]TSC_ADJUST|IA32_TSC_ADJUST MSR is supported if 1.,
>                    [2]SGX|Supports Intel® Software Guard Extensions (Intel® 
> SGX Extensions) if 1.,
>                    ...
> }
> LEAF07,SUBLEAF00,ECX{[0]PREFETCHWT1|(Intel® Xeon PhiTM only.),
>                    [1]AVX512_VBMI|,
>                    ...
> 
> This is just a dumb attempt but I hope it comes across where I'm getting
> with this.

Will check this, and further study the different bits you, Peter and Dave
have mentioned in the discussion.

Thank you all for the review and suggestions!

- Feng

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