Hi Srini,
On 16-09-20, 10:21, Srinivas Kandagatla wrote:
> According to usage (bitfields.h) of REG_FIELDS,
> Modify is:
> reg &= ~REG_FIELD_C;
> reg |= FIELD_PREP(REG_FIELD_C, c);
>
> Patch ("soundwire: qcom : use FIELD_{GET|PREP}") seems to have
> accidentally removed clearing bit field while modifying the register.
>
> Fix this by adding back clear register mask before setting it up!
>
> Signed-off-by: Srinivas Kandagatla <[email protected]>
> ---
> drivers/soundwire/qcom.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c
> index d7aabdaffee3..5d26361ab4f6 100644
> --- a/drivers/soundwire/qcom.c
> +++ b/drivers/soundwire/qcom.c
> @@ -311,6 +311,7 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
>
> /* Configure No pings */
> ctrl->reg_read(ctrl, SWRM_MCP_CFG_ADDR, &val);
> + val &= ~SWRM_MCP_CFG_MAX_NUM_OF_CMD_NO_PINGS_BMSK;
> val |= FIELD_PREP(SWRM_MCP_CFG_MAX_NUM_OF_CMD_NO_PINGS_BMSK,
> SWRM_DEF_CMD_NO_PINGS);
Should we rather use u32_replace_bits() here, I think the intention is
to replace bits.
> ctrl->reg_write(ctrl, SWRM_MCP_CFG_ADDR, val);
>
> @@ -372,6 +373,9 @@ static int qcom_swrm_pre_bank_switch(struct sdw_bus *bus)
>
> ctrl->reg_read(ctrl, reg, &val);
>
> + val &= ~SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK;
> + val &= ~SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK;
> +
> val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK,
> SWRM_MAX_COL_VAL);
> val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK,
> SWRM_MAX_ROW_VAL);
>
> --
> 2.21.0
--
~Vinod
