The following commit has been merged into the timers/core branch of tip: Commit-ID: e69aae713bef63b357d4ff85bcb3f8f63dbf4ba3 Gitweb: https://git.kernel.org/tip/e69aae713bef63b357d4ff85bcb3f8f63dbf4ba3 Author: Zhen Lei <thunder.leiz...@huawei.com> AuthorDate: Fri, 18 Sep 2020 21:22:33 +08:00 Committer: Daniel Lezcano <daniel.lezc...@linaro.org> CommitterDate: Thu, 24 Sep 2020 10:51:04 +02:00
clocksource/drivers/sp804: Prepare for support non-standard register offset Add two local variables: timer1_base and timer2_base in sp804_of_init(), to avoid repeatedly calculate the base address of timer2, and make it easier to recognize timer1. Hope to make the next patch looks more clear. No functional change. Signed-off-by: Zhen Lei <thunder.leiz...@huawei.com> Signed-off-by: Daniel Lezcano <daniel.lezc...@linaro.org> Link: https://lore.kernel.org/r/20200918132237.3552-6-thunder.leiz...@huawei.com --- drivers/clocksource/timer-sp804.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/clocksource/timer-sp804.c b/drivers/clocksource/timer-sp804.c index a443f39..471c5c6 100644 --- a/drivers/clocksource/timer-sp804.c +++ b/drivers/clocksource/timer-sp804.c @@ -188,6 +188,8 @@ static int __init sp804_of_init(struct device_node *np) { static bool initialized = false; void __iomem *base; + void __iomem *timer1_base; + void __iomem *timer2_base; int irq, ret = -EINVAL; u32 irq_num = 0; struct clk *clk1, *clk2; @@ -197,9 +199,12 @@ static int __init sp804_of_init(struct device_node *np) if (!base) return -ENXIO; + timer1_base = base; + timer2_base = base + TIMER_2_BASE; + /* Ensure timers are disabled */ - writel(0, base + TIMER_CTRL); - writel(0, base + TIMER_2_BASE + TIMER_CTRL); + writel(0, timer1_base + TIMER_CTRL); + writel(0, timer2_base + TIMER_CTRL); if (initialized || !of_device_is_available(np)) { ret = -EINVAL; @@ -228,21 +233,21 @@ static int __init sp804_of_init(struct device_node *np) of_property_read_u32(np, "arm,sp804-has-irq", &irq_num); if (irq_num == 2) { - ret = sp804_clockevents_init(base + TIMER_2_BASE, irq, clk2, name); + ret = sp804_clockevents_init(timer2_base, irq, clk2, name); if (ret) goto err; - ret = sp804_clocksource_and_sched_clock_init(base, + ret = sp804_clocksource_and_sched_clock_init(timer1_base, name, clk1, 1); if (ret) goto err; } else { - ret = sp804_clockevents_init(base, irq, clk1, name); + ret = sp804_clockevents_init(timer1_base, irq, clk1, name); if (ret) goto err; - ret = sp804_clocksource_and_sched_clock_init(base + TIMER_2_BASE, + ret = sp804_clocksource_and_sched_clock_init(timer2_base, name, clk2, 1); if (ret) goto err;
