On Sun, Oct 04, 2020 at 12:21:37PM -0700, Rob Clark wrote:
> From: Rob Clark <robdcl...@chromium.org>
> 
> Before adding another lock, give ring->lock a more descriptive name.

Reviewed-by: Jordan Crouse <jcro...@codeaurora.org>

> Signed-off-by: Rob Clark <robdcl...@chromium.org>
> ---
>  drivers/gpu/drm/msm/adreno/a5xx_gpu.c     |  4 ++--
>  drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 12 ++++++------
>  drivers/gpu/drm/msm/adreno/a6xx_gpu.c     |  4 ++--
>  drivers/gpu/drm/msm/msm_ringbuffer.c      |  2 +-
>  drivers/gpu/drm/msm/msm_ringbuffer.h      |  7 ++++++-
>  5 files changed, 17 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c 
> b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> index c941c8138f25..543437a2186e 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> @@ -36,7 +36,7 @@ void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer 
> *ring,
>               OUT_RING(ring, upper_32_bits(shadowptr(a5xx_gpu, ring)));
>       }
>  
> -     spin_lock_irqsave(&ring->lock, flags);
> +     spin_lock_irqsave(&ring->preempt_lock, flags);
>  
>       /* Copy the shadow to the actual register */
>       ring->cur = ring->next;
> @@ -44,7 +44,7 @@ void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer 
> *ring,
>       /* Make sure to wrap wptr if we need to */
>       wptr = get_wptr(ring);
>  
> -     spin_unlock_irqrestore(&ring->lock, flags);
> +     spin_unlock_irqrestore(&ring->preempt_lock, flags);
>  
>       /* Make sure everything is posted before making a decision */
>       mb();
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c 
> b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
> index 7e04509c4e1f..183de1139eeb 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
> @@ -45,9 +45,9 @@ static inline void update_wptr(struct msm_gpu *gpu, struct 
> msm_ringbuffer *ring)
>       if (!ring)
>               return;
>  
> -     spin_lock_irqsave(&ring->lock, flags);
> +     spin_lock_irqsave(&ring->preempt_lock, flags);
>       wptr = get_wptr(ring);
> -     spin_unlock_irqrestore(&ring->lock, flags);
> +     spin_unlock_irqrestore(&ring->preempt_lock, flags);
>  
>       gpu_write(gpu, REG_A5XX_CP_RB_WPTR, wptr);
>  }
> @@ -62,9 +62,9 @@ static struct msm_ringbuffer *get_next_ring(struct msm_gpu 
> *gpu)
>               bool empty;
>               struct msm_ringbuffer *ring = gpu->rb[i];
>  
> -             spin_lock_irqsave(&ring->lock, flags);
> +             spin_lock_irqsave(&ring->preempt_lock, flags);
>               empty = (get_wptr(ring) == ring->memptrs->rptr);
> -             spin_unlock_irqrestore(&ring->lock, flags);
> +             spin_unlock_irqrestore(&ring->preempt_lock, flags);
>  
>               if (!empty)
>                       return ring;
> @@ -132,9 +132,9 @@ void a5xx_preempt_trigger(struct msm_gpu *gpu)
>       }
>  
>       /* Make sure the wptr doesn't update while we're in motion */
> -     spin_lock_irqsave(&ring->lock, flags);
> +     spin_lock_irqsave(&ring->preempt_lock, flags);
>       a5xx_gpu->preempt[ring->id]->wptr = get_wptr(ring);
> -     spin_unlock_irqrestore(&ring->lock, flags);
> +     spin_unlock_irqrestore(&ring->preempt_lock, flags);
>  
>       /* Set the address of the incoming preemption record */
>       gpu_write64(gpu, REG_A5XX_CP_CONTEXT_SWITCH_RESTORE_ADDR_LO,
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c 
> b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> index 8915882e4444..fc85f008d69d 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> @@ -65,7 +65,7 @@ static void a6xx_flush(struct msm_gpu *gpu, struct 
> msm_ringbuffer *ring)
>               OUT_RING(ring, upper_32_bits(shadowptr(a6xx_gpu, ring)));
>       }
>  
> -     spin_lock_irqsave(&ring->lock, flags);
> +     spin_lock_irqsave(&ring->preempt_lock, flags);
>  
>       /* Copy the shadow to the actual register */
>       ring->cur = ring->next;
> @@ -73,7 +73,7 @@ static void a6xx_flush(struct msm_gpu *gpu, struct 
> msm_ringbuffer *ring)
>       /* Make sure to wrap wptr if we need to */
>       wptr = get_wptr(ring);
>  
> -     spin_unlock_irqrestore(&ring->lock, flags);
> +     spin_unlock_irqrestore(&ring->preempt_lock, flags);
>  
>       /* Make sure everything is posted before making a decision */
>       mb();
> diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.c 
> b/drivers/gpu/drm/msm/msm_ringbuffer.c
> index 935bf9b1d941..1b6958e908dc 100644
> --- a/drivers/gpu/drm/msm/msm_ringbuffer.c
> +++ b/drivers/gpu/drm/msm/msm_ringbuffer.c
> @@ -46,7 +46,7 @@ struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu 
> *gpu, int id,
>       ring->memptrs_iova = memptrs_iova;
>  
>       INIT_LIST_HEAD(&ring->submits);
> -     spin_lock_init(&ring->lock);
> +     spin_lock_init(&ring->preempt_lock);
>  
>       snprintf(name, sizeof(name), "gpu-ring-%d", ring->id);
>  
> diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.h 
> b/drivers/gpu/drm/msm/msm_ringbuffer.h
> index 0987d6bf848c..4956d1bc5d0e 100644
> --- a/drivers/gpu/drm/msm/msm_ringbuffer.h
> +++ b/drivers/gpu/drm/msm/msm_ringbuffer.h
> @@ -46,7 +46,12 @@ struct msm_ringbuffer {
>       struct msm_rbmemptrs *memptrs;
>       uint64_t memptrs_iova;
>       struct msm_fence_context *fctx;
> -     spinlock_t lock;
> +
> +     /*
> +      * preempt_lock protects preemption and serializes wptr updates against
> +      * preemption.  Can be aquired from irq context.
> +      */
> +     spinlock_t preempt_lock;
>  };
>  
>  struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
> -- 
> 2.26.2
> 

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