Enable cpufreq for all CPU cores on a100.

Signed-off-by: Shuosheng Huang <huangshuosh...@allwinnertech.com>
---
 .../allwinner/sun50i-a100-allwinner-perf1.dts    | 16 ++++++++++++++++
 arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi   |  6 +++---
 2 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts
index 301793c72cb7..62a770f1a979 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts
@@ -21,6 +21,22 @@ chosen {
        };
 };
 
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu1 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu2 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu3 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
 &pio {
        vcc-pb-supply = <&reg_dcdc1>;
        vcc-pc-supply = <&reg_eldo1>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
index 8f370a175ce6..c6ff172bf599 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
@@ -26,7 +26,7 @@ cpu0: cpu@0 {
                        clocks = <&ccu CLK_CPUX>;
                };
 
-               cpu@1 {
+               cpu1: cpu@1 {
                        compatible = "arm,cortex-a53";
                        device_type = "cpu";
                        reg = <0x1>;
@@ -34,7 +34,7 @@ cpu@1 {
                        clocks = <&ccu CLK_CPUX>;
                };
 
-               cpu@2 {
+               cpu2: cpu@2 {
                        compatible = "arm,cortex-a53";
                        device_type = "cpu";
                        reg = <0x2>;
@@ -42,7 +42,7 @@ cpu@2 {
                        clocks = <&ccu CLK_CPUX>;
                };
 
-               cpu@3 {
+               cpu3: cpu@3 {
                        compatible = "arm,cortex-a53";
                        device_type = "cpu";
                        reg = <0x3>;
-- 
2.28.0

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