From: Badhri Jagan Sridharan <[email protected]> "Table 4-19. POWER_CONTROL Register Definition" from tcpci spec defines BIT(3) as the control bit for bleed discharge.
Cc: Guenter Roeck <[email protected]> Cc: Heikki Krogerus <[email protected]> Cc: Kyle Tso <[email protected]> Signed-off-by: Badhri Jagan Sridharan <[email protected]> Signed-off-by: Will McVicker <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]> --- drivers/usb/typec/tcpm/tcpci.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/usb/typec/tcpm/tcpci.h b/drivers/usb/typec/tcpm/tcpci.h index 116a69c85e38..c3c7d07d9b4e 100644 --- a/drivers/usb/typec/tcpm/tcpci.h +++ b/drivers/usb/typec/tcpm/tcpci.h @@ -72,6 +72,7 @@ #define TCPC_POWER_CTRL 0x1c #define TCPC_POWER_CTRL_VCONN_ENABLE BIT(0) +#define TCPC_POWER_CTRL_BLEED_DISCHARGE BIT(3) #define TCPC_POWER_CTRL_AUTO_DISCHARGE BIT(4) #define TCPC_FAST_ROLE_SWAP_EN BIT(7) -- 2.29.2
