Hi Guenter, Yes I will send a follow up patch to update tcpci_maxim.c.
Thanks, Badhri On Thu, Dec 10, 2020 at 9:45 AM Guenter Roeck <[email protected]> wrote: > > On Thu, Dec 10, 2020 at 05:05:21PM +0100, Greg Kroah-Hartman wrote: > > From: Badhri Jagan Sridharan <[email protected]> > > > > "Table 4-19. POWER_CONTROL Register Definition" from tcpci spec > > defines BIT(3) as the control bit for bleed discharge. > > > > Cc: Guenter Roeck <[email protected]> > > Cc: Heikki Krogerus <[email protected]> > > Cc: Kyle Tso <[email protected]> > > Signed-off-by: Badhri Jagan Sridharan <[email protected]> > > Signed-off-by: Will McVicker <[email protected]> > > Signed-off-by: Greg Kroah-Hartman <[email protected]> > > Just wondering - is that going to be used in a follow-up commit ? > > Reviewed-by: Guenter Roeck <[email protected]> > > Guenter > > > --- > > drivers/usb/typec/tcpm/tcpci.h | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/usb/typec/tcpm/tcpci.h b/drivers/usb/typec/tcpm/tcpci.h > > index 116a69c85e38..c3c7d07d9b4e 100644 > > --- a/drivers/usb/typec/tcpm/tcpci.h > > +++ b/drivers/usb/typec/tcpm/tcpci.h > > @@ -72,6 +72,7 @@ > > > > #define TCPC_POWER_CTRL 0x1c > > #define TCPC_POWER_CTRL_VCONN_ENABLE BIT(0) > > +#define TCPC_POWER_CTRL_BLEED_DISCHARGE BIT(3) > > #define TCPC_POWER_CTRL_AUTO_DISCHARGE BIT(4) > > #define TCPC_FAST_ROLE_SWAP_EN BIT(7) > > > > -- > > 2.29.2 > >
